Sojus07/hackrf
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  • a32724c119 removed a couple GND pins to shorten P20, improving laser cut enclosure ability Michael Ossmann 2013-12-12 16:42:05 -07:00
  • 54b69798db series resistance on CLKOUT to reduce overshoot Michael Ossmann 2013-12-12 16:37:21 -07:00
  • 72662dbbc4 load cap footprints for main crystal just in case Michael Ossmann 2013-12-12 15:54:53 -07:00
  • 6b482b94da set crystal load capacitance to 8 pF Michael Ossmann 2013-12-12 15:47:00 -07:00
  • dc6ffc51be improved orientation marks for big QFNs Michael Ossmann 2013-12-12 15:06:48 -07:00
  • 7a06487c3d better orientation dot on U15 Michael Ossmann 2013-12-12 14:59:31 -07:00
  • ba7f3c86ea changed some 4k7 pull-up or pull-down resistors to 10k to reduce BOM Michael Ossmann 2013-12-12 14:55:46 -07:00
  • a07762bb3e R16 description corrected Michael Ossmann 2013-12-12 14:41:11 -07:00
  • 669c027122 PCB layer markings in copper Michael Ossmann 2013-12-12 14:38:15 -07:00
  • 355597d9e6 swapped CPLD JTAG pins for HackRF One 20131127 Michael Ossmann 2013-12-09 19:06:24 -07:00
  • 9f2260237b Add GPDMA LLI functions to create a loop or one-shot chain of LLIs. Jared Boone 2013-12-08 18:18:22 -08:00
  • 5b59f9cb0a Change GPDMA channel clli member to uint32_t, casting to/from gpdma_lli_t and dealing with the multiple fields was driving me crazy. Jared Boone 2013-12-08 18:16:58 -08:00
  • 6185b67008 Add GPDMA LLI function to enable interrupt after LLI operation is complete. Jared Boone 2013-12-08 17:49:50 -08:00
  • ca070acad0 Expose SGPIO DMA LLI configuration function. Remove LLI declarations internal to SGPIO DMA module. Require a start LLI for SGPIO DMA start functions. Jared Boone 2013-12-08 13:14:26 -08:00
  • ea2ca52301 Rename SGPIO DMA internal function to match style of public functions. Jared Boone 2013-12-08 13:07:32 -08:00
  • ac0d50a131 Remove irrelevant assumption that LLI argument is a pointer to an array. Jared Boone 2013-12-08 13:06:14 -08:00
  • d2fd5e74c5 Change SGPIO DMA configuration API from dividing up a buffer's length into M parts to creating a chain of M transfers of size N. Jared Boone 2013-12-08 13:05:30 -08:00
  • 6196fa2810 Move LLI_COUNT constant out of SGPIO DMA utility functions. Jared Boone 2013-12-08 12:50:20 -08:00
  • 2fab6c40cd Extract SGPIO multi_slice configuration argument into an init-time function, so it doesn't need to be passed each time the SGPIO interface direction is changed. Jared Boone 2013-12-08 12:21:41 -08:00
  • 50ec268794 Bracket SGPIO GPDMA slice configuration with multislice==false test. It only makes sense in single slice mode (until I have a clever idea for doing GPDMA with multiple slices). Jared Boone 2013-12-08 12:14:00 -08:00
  • 809df425c1 Add SGPIO configuration to support GPDMA interrupts. Jared Boone 2013-12-08 11:54:50 -08:00
  • 45c0a6c31a Extract/isolate path details in Makefile_inc.mk. Jared Boone 2013-12-08 11:33:47 -08:00
  • f51ee2dc61 Modified ldscripts to more accurately represent LPC4330 hardware. Moved M0 RAM from local to AHB. Created separate region for sleep RAM. Jared Boone 2013-12-07 15:29:50 -08:00
  • 34b01d89af Add SGPIO DMA configuration code. Jared Boone 2013-12-07 15:29:14 -08:00
  • 3e7ff530d7 Add GPDMA API. Should go in libopencm3 when it's more fleshed-out. Jared Boone 2013-12-07 15:28:59 -08:00
  • 3fb383fb3d 0.2 inch high, 0.1 inch pitch female headers for expansion Michael Ossmann 2013-11-29 14:52:04 -07:00
  • 0eb2e9435d replaced obsolete capacitor selections Michael Ossmann 2013-11-29 11:46:54 -07:00
  • 1128b5103b balanced perceived LED brightness Michael Ossmann 2013-11-29 11:38:51 -07:00
  • c33055e8bf 1% resistors on TX analog baseband signals Michael Ossmann 2013-11-29 11:31:17 -07:00
  • 91b42ed9c6 date on silkscreen Michael Ossmann 2013-11-27 11:57:00 -07:00
  • dd7b3a2dad SSP1_MISO decoupling cap just in case Michael Ossmann 2013-11-27 11:52:56 -07:00
  • c9f0efa288 trace bug introduced previous commit Michael Ossmann 2013-11-27 02:40:14 -07:00
  • e7496c5907 analog baseband header consolidation Michael Ossmann 2013-11-27 02:34:15 -07:00
  • 040aafc399 blinky update for HackRF One Michael Ossmann 2013-11-27 02:33:45 -07:00
  • f00747f260 relabeled LED2 and LED3 to RX and TX Michael Ossmann 2013-11-25 16:59:37 -07:00
  • eab5418a51 optional passives between USB shield and GND Michael Ossmann 2013-11-25 16:55:09 -07:00
  • 693935cd0d clippable GND test point Michael Ossmann 2013-11-25 16:45:37 -07:00
  • a751edb11a changed to SMT RTC crystal. populating for now. might not in the future. Michael Ossmann 2013-11-22 23:40:15 -07:00
  • 9f94565b03 resized USB connector holes Michael Ossmann 2013-11-22 22:49:10 -07:00
  • cd96c356e2 lengthened USB TVS pads Michael Ossmann 2013-11-22 22:35:01 -07:00
  • b5dc5a72c1 nudged USB conector Michael Ossmann 2013-11-22 22:02:54 -07:00
  • f538386c0b nudged pushbuttons Michael Ossmann 2013-11-22 21:48:23 -07:00
  • b61e05faef improved XTAL2 (MAX2837 reference clock) passives Michael Ossmann 2013-11-22 18:42:03 -07:00
  • 72b76a9979 improved REF_IN passives Michael Ossmann 2013-11-22 17:52:28 -07:00
  • 99803c26cb another clock strength adjustment Michael Ossmann 2013-11-22 17:50:10 -07:00
  • ebaccf46f4 adjusted clock generator output drive strength Michael Ossmann 2013-11-22 17:24:53 -07:00
  • 575a8394ed fixed GP_CLKIN passives Michael Ossmann 2013-11-22 17:08:45 -07:00
  • 15a51cab55 grounded pushbutton mechanical support Michael Ossmann 2013-11-22 09:43:10 -07:00
  • 04898a7820 exposed GND through mounting holes Michael Ossmann 2013-11-22 09:33:38 -07:00
  • 42a3582f98 added resistors to decrease clock signal overshoot Michael Ossmann 2013-11-21 18:29:56 -07:00
  • 0002351b21 changed some capacitor values to improve low frequency performance Michael Ossmann 2013-11-21 18:08:49 -07:00
  • 5468a01a9b Forgot to include rf_path.h now that its pin setup is called from hackrf_core. Jared Boone 2013-11-21 10:23:53 -08:00
  • b285b91e4c Merge remote-tracking branch 'mossmann/master' into jboone_refactor_20130906 Jared Boone 2013-11-20 18:43:40 -08:00
  • 62ab69c3d2 Giant .gitignore to knock out build files, Xilinx spew, and editor/OS turds. Jared Boone 2013-11-20 15:51:59 -08:00
  • 9db166427f Remove I2S pin definitions, since they're too specific for generic/shared HackRF code. Jared Boone 2013-11-20 15:46:53 -08:00
  • f453e4c377 Bump libopencm3. Jared Boone 2013-11-20 15:44:15 -08:00
  • 986e4dec93 Massive rework of Makefile_inc.mk, to support building of heterogeneous (M4+M0) binaries, and easy switching between RAM and SPIFI-bootable builds. Constructive criticism welcome -- I'm sure there's better ways to do this. Jared Boone 2013-11-20 15:28:28 -08:00
  • 02ba23bf68 Fix broken sgpio-rx project, broken due to massive changes to how RF path and tuning is done. Jared Boone 2013-11-20 15:24:50 -08:00
  • 893c20e41f Fix naming problem with SGPIO test project. This is due to my use of VPATH in Makefile_inc.mk, which I'm starting to regret a little bit... Jared Boone 2013-11-20 15:24:14 -08:00
  • 552dbe4a6d Add sgpio.c to C files, now required for pin initialization. Jared Boone 2013-11-20 15:23:26 -08:00
  • 6a03f157ff With Makefile RAM/SPIFI option, remove/rework redundant "rom_to_ram" projects. Jared Boone 2013-11-20 15:20:32 -08:00
  • c365d0a37e Add memory regions for M0 code to live. In the "rom_to_ram" (SPIFI) version, put M0 binary in ROM. In the RAM version, put M0 code in the destination RAM region. Jared Boone 2013-11-20 15:14:13 -08:00
  • 31a55d0e9b Assembly file that includes M0 binary into a .o to be linked into the M4 binary. There's certainly a more elegant way, but for now... Jared Boone 2013-11-20 15:13:18 -08:00
  • e29ec6b084 Add default M0 code that just loops forever, if a project doesn't specify any SRC_M0_[CS] files. Jared Boone 2013-11-20 15:09:52 -08:00
  • 91a7ca4983 Fix return value on SGPIO decimation function. Jared Boone 2013-11-20 15:08:59 -08:00
  • e3f9e204c1 Relocate SGPIO pin configuration -- it only needs to be done once. Jared Boone 2013-11-20 13:22:19 -08:00
  • 39276f162c Add M0 linker script. Jared Boone 2013-11-19 19:52:50 -08:00
  • 3bf6573dc6 Add skip-every-N function to CPLD, where N is controlled by three input pins from the microcontroller. Updated SGPIO CPLD testbench, as it had fallen a bit out of date. Add SGPIO API initialization and control of CPLD decimation feature. Jared Boone 2013-11-19 19:52:06 -08:00
  • 24a8e2bdb5 Remove CPLD SVF file, as it's not used by anybody (as far as I know). Jared Boone 2013-11-19 19:45:36 -08:00
  • 5b14636c2c initial firmware support for HackRF One Michael Ossmann 2013-11-19 10:01:26 -07:00
  • 967e699815 Another little fix for the two's complement change -- initialize SGPIO data registers to DAC zero values. Jared Boone 2013-11-17 22:23:08 -08:00
  • a909ca641c moved GCK1 test point Michael Ossmann 2013-11-16 21:39:15 -07:00
  • ca2162da29 forgot to save schematic Michael Ossmann 2013-11-16 21:26:07 -07:00
  • 95ffc704a1 P28 and P29 reworked, exposed unused SGPIO signals, moved some CPLD JTAG signals to P28 Michael Ossmann 2013-11-16 21:22:25 -07:00
  • d006ec769c Updated CPLD bitstream with two's complement I/O and sample ordering fix. Jared Boone 2013-11-16 13:41:54 -08:00
  • 89eafaa79a Remove sample-pair reordering in SGPIO interrupt -- CPLD fixes address this. Jared Boone 2013-11-16 13:32:41 -08:00
  • 7ef9c1e932 Slow down edges of data lines coming from CPLD. Jared Boone 2013-11-16 13:31:19 -08:00
  • 147f47a3f5 Invert Q channel data coming from MAX5864, since MAX2837 Q differential pair is reversed. Do conversion from unsigned to two's-compliment inside FPGA. Jared Boone 2013-11-16 13:29:00 -08:00
  • 9856ea3d14 Changes due to CGU header API changes. Jared Boone 2013-11-15 11:41:20 -08:00
  • db3ef109fa forgot to save schematic when adding clock signals to header Michael Ossmann 2013-11-11 20:56:47 -07:00
  • 06f345239b silkscreen tweaks Michael Ossmann 2013-11-11 20:49:57 -07:00
  • fecc7346b3 GND test points Michael Ossmann 2013-11-11 19:25:28 -07:00
  • a8c2c0b6d1 more decoupling caps Michael Ossmann 2013-11-11 19:07:28 -07:00
  • 26104e6735 nudged some traces in the RF section Michael Ossmann 2013-11-11 18:48:39 -07:00
  • c5533b3c96 reworked zones so LED signals do not cross power planes Michael Ossmann 2013-11-11 18:04:45 -07:00
  • 515b6973aa exposed GCK1, GCK2 on expansion P28 instead of extra CPLD pins. also ditched 1V8 on P30 Michael Ossmann 2013-11-11 17:23:45 -07:00
  • f576fc27f0 rerouted 1V8 Michael Ossmann 2013-11-11 16:58:30 -07:00
  • 1b3da372b9 CPLD JTAG cleanup Michael Ossmann 2013-11-11 16:37:43 -07:00
  • 4577439912 keep GCK1 on front side Michael Ossmann 2013-11-11 16:32:37 -07:00
  • 174c3b427b still cleaning Michael Ossmann 2013-11-11 11:09:48 -07:00
  • fbcc3b60ec still more clean-up Michael Ossmann 2013-11-11 10:57:08 -07:00
  • 923971402c a little more clean-up Michael Ossmann 2013-11-11 10:51:12 -07:00
  • 976096f019 a little clean-up Michael Ossmann 2013-11-11 10:25:46 -07:00
  • f7e1b15cc9 more mounting holes Michael Ossmann 2013-11-11 10:04:29 -07:00
  • 20518a77d5 SPIFI test points Michael Ossmann 2013-11-10 23:17:48 -07:00
  • 5beef42bc5 track clean-up Michael Ossmann 2013-11-10 23:11:04 -07:00
  • d6b7202e64 corner holes Michael Ossmann 2013-11-10 20:23:04 -07:00
  • 198bc7afeb TVS diodes for CLKIN and CLKOUT Michael Ossmann 2013-11-10 20:19:38 -07:00
  • afba176de4 USB shield break-out Michael Ossmann 2013-11-10 20:11:00 -07:00
  • 1fa9c9aa04 many test points Michael Ossmann 2013-11-10 19:53:25 -07:00