swapped CPLD JTAG pins for HackRF One 20131127
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@ -79,9 +79,8 @@ extern "C"
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/* CPLD JTAG interface */
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#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */
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#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */
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//FIXME swap TDI and TMS once more recent HackRF One PCBs are built:
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#define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */
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#define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */
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#define SCU_PINMUX_CPLD_TMS (P6_5) /* GPIO3[ 4] */
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#define SCU_PINMUX_CPLD_TDI (P6_2) /* GPIO3[ 1] */
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/* CPLD SGPIO interface */
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#define SCU_PINMUX_SGPIO0 (P0_0)
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@ -287,9 +286,9 @@ extern "C"
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#define PORT_CPLD_TDO (GPIO5)
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#define PIN_CPLD_TCK (GPIOPIN0)
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#define PORT_CPLD_TCK (GPIO3)
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#define PIN_CPLD_TMS (GPIOPIN1)
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#define PIN_CPLD_TMS (GPIOPIN4)
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#define PORT_CPLD_TMS (GPIO3)
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#define PIN_CPLD_TDI (GPIOPIN4)
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#define PIN_CPLD_TDI (GPIOPIN1)
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#define PORT_CPLD_TDI (GPIO3)
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/* Read GPIO Pin */
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