Sojus07/hackrf
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412 Commits

Author SHA1 Message Date
Jared Boone
3a9d7432c3 Changed compile optimization flag to -Os from -O2. TitanMKD demonstrated conclusively that it's a good thing. 2012-10-10 16:27:05 -07:00
Jared Boone
8a54e09e15 Elimination of unused argument warnings. 2012-10-10 16:13:37 -07:00
Jared Boone
092c5b7b0f Removed removing of .usbram section from .bin file output. Because there's no more .usbram section! 2012-10-10 15:42:30 -07:00
Jared Boone
5989465eb9 Add SGPIO configuration API and code, extracted from existing SGPIO projects. 2012-10-10 14:30:28 -07:00
Jared Boone
39eb2682f9 Split ram_ahb memory region into two, with a 32K hole where the USB buffers live. 
Split ram region into two, representing the two local RAM buses.
Remove reference to usbram.ld, since it's no longer necessary.
 2012-10-10 14:27:21 -07:00
Jared Boone
f34e30510d Added fault handler header file, where I've defined the Cortex-M3/M4 SCB using a struct instead of a slew of #defines. This deviates from the libopencm3 method, but is superior in other ways. So, there you go. It's not in libopencm3, it's here. 
Added example (er, "reminder") code comment about registers to look at when debugging a Hard Fault.
 2012-10-10 13:36:10 -07:00
Jared Boone
685f5cdd6e More detail in comments about Jellybean/Lemondrop clock destinations. 2012-10-10 11:51:06 -07:00
Jared Boone
4f9a5a1ba4 Fix-ups to copyrights -- missing e-mail address and inconsistent formatting. 2012-10-06 19:14:55 -07:00
Jared Boone
900463ee5c Added fault handler code which can be optionally compiled/linked for debugging. 2012-10-06 17:35:11 -07:00
Jared Boone
f68fdaba7a Add .usbram section handling to linker scripts and makefile. 2012-10-06 17:33:17 -07:00
Jared Boone
182157a19c Add ram_ahb memory region to linker scripts. 2012-10-06 17:30:26 -07:00
Jared Boone
46f24d6f47 Remove ROM memory region from "ram_only" linker script. 2012-10-06 17:29:56 -07:00
Jared Boone
cf32fb96fe Merge branch 'master' of https://github.com/mossmann/hackrf 2012-10-03 09:26:30 -07:00
Michael Ossmann
d1aac9860a fixed jawbreaker MIX_BYPASS bug 2012-10-02 23:10:13 -06:00
Michael Ossmann
d6005d1cc5 fixed jawbreaker bug: different pin for SGPIO8 2012-10-02 17:51:05 -06:00
Michael Ossmann
11ade349d1 fixed jawbreaker bug: activate correct pin function for MIXER_SCLK 2012-10-02 16:21:17 -06:00
Michael Ossmann
c70d410394 reverted "rom" address to shadow area (allows same binary to be booted from SPIFI or USB/DFU) 2012-10-02 15:15:29 -06:00
Jared Boone
a975fbc577 Replaced apparently incorrect PLL0USB MDIV and NP_DIV values with values straight out of the User Manual's table 94. 2012-09-27 19:29:43 -07:00
Jared Boone
aaaf14819a Move PLL1/M4 CLK up to full speed (204MHz) in two steps, according to UM chapter 11.2.1. 2012-09-27 18:58:00 -07:00
Jared Boone
776c502628 More tweaks related to CGU #define changes. 2012-09-27 17:55:54 -07:00
Jared Boone
416cdc6b20 Added missing hackrf_core pin_setup() and enable_1v8_power(), which have somehow gone missing. 2012-09-27 16:26:47 -07:00
Jared Boone
ecb497aa97 Merge branch 'master' of https://github.com/mossmann/hackrf 
Conflicts:
	firmware/common/hackrf_core.c
 2012-09-27 14:58:31 -07:00
Michael Ossmann
df740440b0 fill lodiv register with n_lo, not lodiv variable (inconsistent naming is inherited from RFFC docs) 2012-09-20 16:52:38 -06:00
Michael Ossmann
d6a94a339a RFFC tx and rx functions updated for Jawbreaker 2012-09-20 12:41:11 -06:00
Michael Ossmann
237df75789 extra clock after RFFC serial transactions, Jawbreaker RF switch control 2012-09-20 11:59:33 -06:00
Michael Ossmann
425a384832 Jawbreaker LPC crystal oscillator startup 2012-09-20 10:53:07 -06:00
Michael Ossmann
2c813ec41e Jawbreaker clock generator configuration 2012-09-19 13:43:16 -06:00
Michael Ossmann
7d0c572569 Jawbreaker mixer serial interface support 2012-09-19 11:55:24 -06:00
Jared Boone
af1281fdbe LDScript for RAM-only operation. (That's how I like to roll -- load RAM over SWD and execute.) 2012-09-11 11:33:07 -07:00
Jared Boone
7d942c86ac Exposing the delay() core function. 2012-09-11 11:32:20 -07:00
Jared Boone
f5d21b947b Changes to bit band API to make it more type-sane. 2012-09-11 11:31:49 -07:00
Jared Boone
ec0bbe53c4 Merge branch 'master' of https://github.com/mossmann/hackrf 2012-09-11 09:51:51 -07:00
Will Code
d7a7825f85 Fix overflows in shifts, suppress warnings for temporarily unused variables. 2012-09-04 20:08:30 -04:00
Jared Boone
94cffa41e5 Merge branch 'master' of https://github.com/mossmann/hackrf 2012-09-04 09:24:18 -07:00
Will Code
599acbe142 Driver for RFFC5071 2012-09-03 19:16:09 -04:00
Will Code
f595bd149b Error in bit shift 2012-09-03 19:15:49 -04:00
Jared Boone
8758bb05ba Merge branch 'master' of https://github.com/mossmann/hackrf 2012-08-25 15:02:27 -07:00
Michael Ossmann
6d74a94e54 configure both mixers 2012-08-23 21:34:38 -06:00
Michael Ossmann
834b3aabd1 RFFC5071 integer tuning function 2012-08-23 16:30:45 -06:00
Michael Ossmann
344a2f2a83 more clock generator config fixes 2012-08-23 12:59:49 -06:00
Michael Ossmann
5364c91f7b hard coded 8 MHz baseband filter for now 2012-08-23 09:52:16 -06:00
Michael Ossmann
cbd2d98c7d fixed bad output spectrum. problem was P3 = 0 in si5351c pll, similar to commit b595de647077f208c534e4efc0bce92f25378fb8 2012-08-22 10:41:53 -06:00
Jared Boone
9f4f1d0b6b Bitband library, factored out of other code. 2012-07-31 22:07:08 -07:00
Jared Boone
f0e4cffb87 Removed release_cpld_jtag_pins() and incorporated code into pin_setup(). 2012-07-31 22:03:01 -07:00
Jared Boone
72ee83eda9 Moving gpio_setup() / pin_setup() functions in separate projects to hackrf_core.h/c. 
Moved enable_1v8_power() and release_cpld_jtag_pins() to hackrf_core.h/c.
 2012-07-31 21:38:57 -07:00
Jared Boone
9f334fc5f0 Simple support for MAX5864 configuration via SPI. 2012-07-19 14:57:06 -07:00
TitanMKD
53c7fcf768 * Fixed linker script form SPIFI and RAM execution. 
* Added performance checks and results on SPIFI & SRAM code execution.
 2012-06-25 22:15:10 +02:00
Michael Ossmann
ba909c0fe5 MAX2837 TXVGA register bug fix 2012-06-18 17:32:23 -06:00
Jared Boone
9a53fd3a07 New CPLD .svf. 
Change Si5351C CLK2 to 10MHz.
Keep CLK3 at 20MHz, but not inverted.
Source SGPIO8 from P1_12 instead of P9_6. (See "SGPIO Clock Routing") modification at https://github.com/mossmann/hackrf/wiki/Future-Hardware-Modifications ).
 2012-06-15 16:12:35 -07:00
Jared Boone
f0bf6dbf97 Merge branch 'master' of https://github.com/mossmann/hackrf 2012-06-15 15:11:16 -07:00