Jared Boone
9c4a0e94b0
Factor out sample_rate_set() from cpu_clock_init().
...
Implement switching between several supported sampling rates for Jellybean and Jawbreaker.
Commit bits of the Si5351C USB request support that I apparently missed in a prior commit.
2012-10-17 16:57:26 -07:00
Jared Boone
6f0fda0bee
Moved transceiver_mode_t to hackrf_core.h.
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Changed transceiver_mode to volatile, since it's liable to be accessed at interrupt time.
2012-10-11 15:12:25 -07:00
Jared Boone
4f9a5a1ba4
Fix-ups to copyrights -- missing e-mail address and inconsistent formatting.
2012-10-06 19:14:55 -07:00
Jared Boone
cf32fb96fe
Merge branch 'master' of https://github.com/mossmann/hackrf
2012-10-03 09:26:30 -07:00
Michael Ossmann
d6005d1cc5
fixed jawbreaker bug: different pin for SGPIO8
2012-10-02 17:51:05 -06:00
Jared Boone
ecb497aa97
Merge branch 'master' of https://github.com/mossmann/hackrf
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Conflicts:
firmware/common/hackrf_core.c
2012-09-27 14:58:31 -07:00
Michael Ossmann
7d0c572569
Jawbreaker mixer serial interface support
2012-09-19 11:55:24 -06:00
Jared Boone
7d942c86ac
Exposing the delay() core function.
2012-09-11 11:32:20 -07:00
Jared Boone
f0e4cffb87
Removed release_cpld_jtag_pins() and incorporated code into pin_setup().
2012-07-31 22:03:01 -07:00
Jared Boone
72ee83eda9
Moving gpio_setup() / pin_setup() functions in separate projects to hackrf_core.h/c.
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Moved enable_1v8_power() and release_cpld_jtag_pins() to hackrf_core.h/c.
2012-07-31 21:38:57 -07:00
Jared Boone
9a53fd3a07
New CPLD .svf.
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Change Si5351C CLK2 to 10MHz.
Keep CLK3 at 20MHz, but not inverted.
Source SGPIO8 from P1_12 instead of P9_6. (See "SGPIO Clock Routing") modification at https://github.com/mossmann/hackrf/wiki/Future-Hardware-Modifications ).
2012-06-15 16:12:35 -07:00
Jared Boone
f08fc3bb51
Pulled SSP1 configuration for MAX2837 into hackrf_core. Added SSP1 configuration for MAX5864. Added #defines for manipulating CS of both MAX parts. Changed a couple of #define names to be consistent with other names. Added explicit manipulation of MAX2837 CS via GPIO.
2012-06-14 13:06:10 -07:00
Michael Ossmann
68f9a1c6e4
fixed inconsistent naming of mixer pins
2012-06-14 10:44:22 -06:00
Michael Ossmann
25c3f6729d
Merge branch 'jboone-master'
2012-06-13 21:23:10 -06:00
Michael Ossmann
10cebd1f83
RFFC5071 pin defs
2012-06-13 21:08:07 -06:00
Jared Boone
ca18d36779
#defines for CPLD JTAG interface on LPC43xx.
2012-06-13 16:47:38 -07:00
Michael Ossmann
d876ae7e86
max2837 and simpletx additions, still not quite working
2012-06-11 15:09:33 -06:00
Michael Ossmann
65b02cf6c9
reversed include addition. lpc43.h is no longer needed now that we are using libopencm3.
2012-06-07 19:30:54 -06:00
Jared Boone
cea1a66d39
Added hackrf_core.h #include for lpc43.h dependency.
2012-06-07 16:34:36 -07:00
Michael Ossmann
aeced361cf
migrated common stuff to libopencm3
2012-06-07 08:14:16 -06:00
TitanMKD
acc806d5ce
* Add PIN_EN1V8 (1V8 work fine 1V8 LED is set to ON), and PIN_BOOT0, 1, 2 & 3(read only).
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* Fixed wait() by using volatile else the loop was removed by GCC.
Tested it with SPIFI work fine:
SPIFI tested with LPCXpresso+NXP LPC Link (from LPCXpresso Board LPC1769 Debugger)
-> Program Flash with Flash Driver LPC1850A_4350A_SPIFI.cfx
-> Select file: firmware\blinky\blinky.bin
-> Base address 0x14000000 & option Erase only required pages
2012-05-28 00:02:48 +02:00
Michael Ossmann
a748e31328
started firmware directory with some basic stuff
2012-05-21 11:33:46 -06:00