161 lines
5.1 KiB
C
161 lines
5.1 KiB
C
/*
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* Copyright 2012 Michael Ossmann <mike@ossmann.com>
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* Copyright 2012 Benjamin Vernoux <titanmkd@gmail.com>
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* Copyright (C) 2012 Jared Boone <jared@sharebrained.com>
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __HACKRF_CORE_H
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#define __HACKRF_CORE_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* hardware identification number */
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#define BOARD_ID_JELLYBEAN 0
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#ifdef JELLYBEAN
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#define BOARD_ID BOARD_ID_JELLYBEAN
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#endif
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#ifdef JELLYBEAN
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/*
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* Jellybean SCU PinMux
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*/
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/* GPIO Output PinMux */
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#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */
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#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */
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#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */
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#define SCU_PINMUX_EN1V8 (P6_10) /* GPIO3[6] on P6_10 */
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/* GPIO Input PinMux */
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#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */
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#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */
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#define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */
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#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
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/* SSP1 Peripheral PinMux */
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#define SCU_SSP1_MISO (P1_3) /* P1_3 */
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#define SCU_SSP1_MOSI (P1_4) /* P1_4 */
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#define SCU_SSP1_SCK (P1_19) /* P1_19 */
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#define SCU_SSP1_SSEL (P1_20) /* P1_20 */
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/* CPLD JTAG interface */
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#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */
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#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */
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#define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */
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#define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */
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/* CPLD SGPIO interface */
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#define SCU_PINMUX_SGPIO0 (P0_0)
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#define SCU_PINMUX_SGPIO1 (P0_1)
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#define SCU_PINMUX_SGPIO2 (P1_15)
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#define SCU_PINMUX_SGPIO3 (P1_16)
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#define SCU_PINMUX_SGPIO4 (P6_3)
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#define SCU_PINMUX_SGPIO5 (P6_6)
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#define SCU_PINMUX_SGPIO6 (P2_2)
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#define SCU_PINMUX_SGPIO7 (P1_0)
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#define SCU_PINMUX_SGPIO8 (P9_6)
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#define SCU_PINMUX_SGPIO9 (P4_3)
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#define SCU_PINMUX_SGPIO10 (P1_14)
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#define SCU_PINMUX_SGPIO11 (P1_17)
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#define SCU_PINMUX_SGPIO12 (P1_18)
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#define SCU_PINMUX_SGPIO13 (P4_8)
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#define SCU_PINMUX_SGPIO14 (P4_9)
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#define SCU_PINMUX_SGPIO15 (P4_10)
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/* MAX2837 GPIO (XCVR_CTL) PinMux */
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#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */
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#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */
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#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */
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/* MAX5864 SPI chip select (CS_AD) GPIO PinMux */
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#define SCU_CS_AD (P5_7) /* GPIO2[7] on P5_7 */
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/* RFFC5071 GPIO serial interface PinMux */
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#define SCU_MIXER_ENX (P7_0) /* GPIO3[8] on P7_0 */
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#define SCU_MIXER_CLK (P7_1) /* GPIO3[9] on P7_1 */
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#define SCU_MIXER_DATA (P7_2) /* GPIO3[10] on P7_2 */
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/* TODO add other Pins */
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/*
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* Jellybean GPIO Pins
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*/
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/* GPIO Output */
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#define PIN_LED1 (BIT1) /* GPIO2[1] on P4_1 */
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#define PIN_LED2 (BIT2) /* GPIO2[2] on P4_2 */
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#define PIN_LED3 (BIT8) /* GPIO2[8] on P6_12 */
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#define PORT_LED1_3 (GPIO2) /* PORT for LED1, 2 & 3 */
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#define PIN_EN1V8 (BIT6) /* GPIO3[6] on P6_10 */
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#define PORT_EN1V8 (GPIO3)
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#define PIN_XCVR_ENABLE (BIT6) /* GPIO2[6] on P4_6 */
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#define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */
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#define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */
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#define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */
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#define PIN_CS_AD (BIT7) /* GPIO2[7] on P5_7 */
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#define PORT_CS_AD (GPIO2) /* PORT for CS_AD */
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#define PIN_MIXER_ENX (BIT8) /* GPIO3[8] on P7_0 */
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#define PIN_MIXER_CLK (BIT9) /* GPIO3[9] on P7_1 */
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#define PIN_MIXER_DATA (BIT10) /* GPIO3[10] on P7_2 */
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#define PORT_MIXER (GPIO3) /* PORT for mixer serial interface */
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/* GPIO Input */
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#define PIN_BOOT0 (BIT8) /* GPIO0[8] on P1_1 */
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#define PIN_BOOT1 (BIT9) /* GPIO0[9] on P1_2 */
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#define PIN_BOOT2 (BIT7) /* GPIO5[7] on P2_8 */
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#define PIN_BOOT3 (BIT10) /* GPIO1[10] on P2_9 */
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/* CPLD JTAG interface GPIO pins */
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#define PIN_CPLD_TDO (GPIOPIN18)
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#define PORT_CPLD_TDO (GPIO5)
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#define PIN_CPLD_TCK (GPIOPIN0)
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#define PORT_CPLD_TCK (GPIO3)
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#define PIN_CPLD_TMS (GPIOPIN1)
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#define PORT_CPLD_TMS (GPIO3)
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#define PIN_CPLD_TDI (GPIOPIN4)
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#define PORT_CPLD_TDI (GPIO3)
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/* Read GPIO Pin */
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#define BOOT0_STATE ((GPIO0_PIN & PIN_BOOT0)==PIN_BOOT0)
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#define BOOT1_STATE ((GPIO0_PIN & PIN_BOOT1)==PIN_BOOT1)
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#define BOOT2_STATE ((GPIO5_PIN & PIN_BOOT2)==PIN_BOOT2)
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#define BOOT3_STATE ((GPIO1_PIN & PIN_BOOT3)==PIN_BOOT3)
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#define MIXER_DATA_STATE ((GPIO3_PIN & PIN_MIXER_DATA)==PIN_MIXER_DATA)
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/* TODO add other Pins */
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#endif
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void cpu_clock_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HACKRF_CORE_H */
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