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  • 91225a860e corrected crystal selection Michael Ossmann 2012-07-13 13:09:48 -06:00
  • 73502557c8 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-07-13 18:53:36 +02:00
  • dacfd52e2d tracks Michael Ossmann 2012-07-13 10:24:56 -06:00
  • 4b97215e1b tracks Michael Ossmann 2012-07-13 09:48:35 -06:00
  • fb7536b9b3 tracks Michael Ossmann 2012-07-13 09:29:01 -06:00
  • d40f736a3a zones Michael Ossmann 2012-07-12 13:30:13 -06:00
  • 593fad1dc9 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-07-12 20:41:42 +02:00
  • 927f132b65 RF traces Michael Ossmann 2012-07-12 11:51:31 -06:00
  • aa0217fba7 mounting holes Michael Ossmann 2012-07-11 17:43:48 -06:00
  • 66fd66274f rough positions Michael Ossmann 2012-07-11 17:37:18 -06:00
  • f7b8d04e93 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-07-11 23:38:02 +02:00
  • ad18781463 finished modules and selection Michael Ossmann 2012-07-11 13:26:00 -06:00
  • a64339f7c3 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-07-09 18:53:16 +02:00
  • ec807b943f started module selection, Anaren balun module Michael Ossmann 2012-07-08 14:53:25 -06:00
  • 65787ab070 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-07-07 22:07:24 +02:00
  • b137550c60 reoriented filters Michael Ossmann 2012-07-06 14:57:40 -06:00
  • a77682f04f switched to 0.05 pF TVS diodes Michael Ossmann 2012-07-06 14:26:47 -06:00
  • 2516504fca ferrite beads per TRF3765 recommendations Michael Ossmann 2012-07-06 13:20:03 -06:00
  • 7c9c840ad7 optional LO filters Michael Ossmann 2012-07-06 12:45:19 -06:00
  • 4fd8c47ed9 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-07-06 19:06:09 +02:00
  • 64919dc27b Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-07-05 17:24:59 -07:00
  • c0538167ba reworked balun bias again Michael Ossmann 2012-07-05 18:23:33 -06:00
  • d7a6d55b63 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-07-05 17:08:33 -07:00
  • 22fe7ee23d fixed balun bias Michael Ossmann 2012-07-05 18:00:15 -06:00
  • ab12e147f3 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-07-05 16:49:59 -07:00
  • 5174f0632f updated Anaren balun topology Michael Ossmann 2012-07-05 17:47:45 -06:00
  • 1098c3a712 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-07-02 11:39:04 -07:00
  • 64656d1e92 SGPIO passthrough CPLD project, for TitanMKD's testing. Jared Boone 2012-07-02 11:30:44 -07:00
  • 130a15df37 renamed switch signals - hopefully clearer Michael Ossmann 2012-07-01 15:21:49 -06:00
  • c641f36136 reference clock divider Michael Ossmann 2012-07-01 14:26:47 -06:00
  • a02ce32809 fixed LO bypass mode by introducing intermediate mixer bias voltage Michael Ossmann 2012-07-01 14:00:27 -06:00
  • 44fb10d0ab noticed bias problem with LO bypass mode Michael Ossmann 2012-07-01 07:31:27 -06:00
  • ac76517a1c loop filter values for PFD at 1.6 MHz Michael Ossmann 2012-06-30 12:23:21 -06:00
  • ce70c6ccd3 Merge branch 'master' of github.com:mossmann/hackrf Michael Ossmann 2012-06-28 08:44:58 -06:00
  • b9857d9408 Merge pull request #13 from TitanMKD/master Michael Ossmann 2012-06-28 07:45:07 -07:00
  • 7cd104dc95 passive values Michael Ossmann 2012-06-27 22:46:06 -06:00
  • 0909f42404 bom info Michael Ossmann 2012-06-27 22:18:50 -06:00
  • 7ac90cd308 matched n-channel mosfets to keep impedance the same between differential paths Michael Ossmann 2012-06-27 21:57:07 -06:00
  • 2c43a1d5ed fixed p-channel mosfet orientation Michael Ossmann 2012-06-27 21:52:24 -06:00
  • 80e4529544 SPIFI Tests with OLS & JellyBean. TitanMKD 2012-06-26 22:12:46 +02:00
  • a784812100 updated require connections Michael Ossmann 2012-06-25 23:36:09 -06:00
  • ad5a106f68 Merge branch 'master' of github.com:mossmann/hackrf Michael Ossmann 2012-06-25 23:33:34 -06:00
  • 2dc1286b3c Merge pull request #12 from TitanMKD/master Michael Ossmann 2012-06-25 17:12:03 -07:00
  • 988b3e3a49 Fixed simple systick example TitanMKD 2012-06-25 22:45:18 +02:00
  • bb12d3f601 Example removed and replaced by startup_systick_perfo_rom_to_ram TitanMKD 2012-06-25 22:34:29 +02:00
  • 53c7fcf768 * Fixed linker script form SPIFI and RAM execution. * Added performance checks and results on SPIFI & SRAM code execution. TitanMKD 2012-06-25 22:15:10 +02:00
  • dfb38a5a59 Fix asm macro TitanMKD 2012-06-25 22:02:55 +02:00
  • ff0ae6157a Merge branch 'master' of git://github.com/jboone/hackrf TitanMKD 2012-06-24 21:27:45 +02:00
  • c5071f40f2 name and date on silkscreen Michael Ossmann 2012-06-23 08:22:28 -06:00
  • 1df6c29fa7 Merge branch 'master' of git://github.com/mossmann/hackrf TitanMKD 2012-06-22 18:13:53 +02:00
  • 0506334321 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-06-21 18:44:43 -07:00
  • 9535249efc forgot to redo zones Michael Ossmann 2012-06-21 19:11:56 -06:00
  • 10133bdf27 redid highpass filter module now that I understand the drawing in the datasheet Michael Ossmann 2012-06-21 19:10:58 -06:00
  • e232f7df20 flipped U8 to make more sense in the schematic Michael Ossmann 2012-06-21 18:56:16 -06:00
  • 60e73e2d33 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-06-21 17:55:32 -07:00
  • c9444582b2 fixed LP0603 pinout, footprint Michael Ossmann 2012-06-21 18:48:31 -06:00
  • 67d3e94a17 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-06-21 16:06:12 -07:00
  • bae1cc7c63 Merge branch 'master' of git://github.com/jboone/hackrf TitanMKD 2012-06-21 22:37:54 +02:00
  • 5207489527 disconnected pin 5 per B0310J50100AHF datasheet Michael Ossmann 2012-06-21 12:06:40 -06:00
  • 69935ee88c minor cleanup Michael Ossmann 2012-06-21 11:46:46 -06:00
  • 7de081c7d5 Bubblegum redesign assuming TX_BALUN and RX_BALUN can operate from 10 MHz to 6 GHz Michael Ossmann 2012-06-21 00:15:04 -06:00
  • 0a5fed5933 tied unused logic input to VCC Michael Ossmann 2012-06-20 15:14:42 -06:00
  • 0277159ce5 tied unused logic input to VCC Michael Ossmann 2012-06-20 13:56:51 -06:00
  • 2e16f51252 Python program to verify logic on the Lollipop board. Jared Boone 2012-06-19 23:09:42 -07:00
  • 2f5b4fb778 updated layout for switch logic bug fix Michael Ossmann 2012-06-20 00:08:12 -06:00
  • 2a9502cb50 fixed more switch logic bugs Michael Ossmann 2012-06-19 23:51:57 -06:00
  • 81f840e623 finished first pass at schematic for bubblegum, an alternative wideband front end Michael Ossmann 2012-06-19 17:05:41 -06:00
  • 3d7d80c14a reworked layout to fix switch logic bugs Michael Ossmann 2012-06-19 12:23:53 -06:00
  • c7aeb2007f fixed PVQFN-14 modules for logic ICs (pins were numbered incorrectly) Michael Ossmann 2012-06-19 10:48:42 -06:00
  • 53389064f1 fixed switch logic errors in schematic Michael Ossmann 2012-06-18 21:35:13 -06:00
  • ba909c0fe5 MAX2837 TXVGA register bug fix Michael Ossmann 2012-06-18 17:32:23 -06:00
  • a65186f83c Merge pull request #11 from jboone/master Michael Ossmann 2012-06-18 15:23:38 -07:00
  • 72e3dc1e21 TX sample generation loop that outputs an eight-sample sine wave. (1.25MHz assuming 10MHz codec clock.) Jared Boone 2012-06-15 16:20:46 -07:00
  • bab6ec5fef Move buffer allocation to before enabling CPLD I/O, so as not to mess up I/Q synchronization. Jared Boone 2012-06-15 16:16:05 -07:00
  • e32a60495a Change initial TX output data to the neutral value (0x80). Jared Boone 2012-06-15 16:14:58 -07:00
  • 59a5b92300 Correct CPLD JTAG pin release code to properly tri-state the pins. Jared Boone 2012-06-15 16:13:17 -07:00
  • 9a53fd3a07 New CPLD .svf. Change Si5351C CLK2 to 10MHz. Keep CLK3 at 20MHz, but not inverted. Source SGPIO8 from P1_12 instead of P9_6. (See "SGPIO Clock Routing") modification at https://github.com/mossmann/hackrf/wiki/Future-Hardware-Modifications ). Jared Boone 2012-06-15 16:12:35 -07:00
  • 18d09d2ae2 Renamed incorrectly-named Wiki image. Jared Boone 2012-06-15 15:17:57 -07:00
  • f0bf6dbf97 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-06-15 15:11:16 -07:00
  • 52b665e16c Pictures of SGPIO changes made to improve CPLD/SGPIO clocking. Jared Boone 2012-06-15 15:08:49 -07:00
  • 10e20fbce2 cut out serial test and do some actual mixing Michael Ossmann 2012-06-14 22:00:27 -06:00
  • d68036f79d Eliminate ill-conceived HOST_CLK from CPLD. Rearrange clocks to not use AC-coupled CLK1 from Si5351C. Move CODEC_CLK to GCLK1, CODEC_X2_CLK (now HOST_CLK, too) to GCLK2. Add trace on Jellybean PCB to connect GCLK2 to LPC4330 pin 56 (P1_12) -- a different SGPIO8. Jared Boone 2012-06-14 19:08:20 -07:00
  • b0ebd75188 two-clocks-while-ENX-high fix for write operations, various example PLL configs Michael Ossmann 2012-06-14 19:52:45 -06:00
  • f53818a46f Additional calls to initialize SSP1, considering changes I committed minutes earlier. Jared Boone 2012-06-14 13:09:02 -07:00
  • 570efc1361 Added max2837_rx() function. Jared Boone 2012-06-14 13:06:48 -07:00
  • f08fc3bb51 Pulled SSP1 configuration for MAX2837 into hackrf_core. Added SSP1 configuration for MAX5864. Added #defines for manipulating CS of both MAX parts. Changed a couple of #define names to be consistent with other names. Added explicit manipulation of MAX2837 CS via GPIO. Jared Boone 2012-06-14 13:06:10 -07:00
  • 74ad447ec7 More idiotic editor formatting fixup. Jared Boone 2012-06-14 11:48:07 -07:00
  • 06b63d9936 added two clocks while ENX high to get RFFC5071 serial reads to work (thanks, Jared!) Michael Ossmann 2012-06-14 12:42:51 -06:00
  • 388cad86de Code to capture ADC data into a buffer using a tight loop on the M4. Jared Boone 2012-06-14 11:31:11 -07:00
  • 878936645d Corrected my correction of my misunderstanding of how SGPIO_CTRL_ENABLE works. Turns out I *can* immediately disable a slice using ENABLE. If I want to synchronously disable a slice, I do it via DISABLE. And if I want to screw up my code, I (unwittingly) set all slices to synchronously disable, then configure SGPIO and watch my slices run once and stop. :-( All better now. Jared Boone 2012-06-14 11:30:03 -07:00
  • ef46b9b3b6 Merge branch 'master' of https://github.com/mossmann/hackrf Jared Boone 2012-06-14 10:01:35 -07:00
  • 2c76cc9bd2 fixed pinout in README Michael Ossmann 2012-06-14 10:46:55 -06:00
  • 68f9a1c6e4 fixed inconsistent naming of mixer pins Michael Ossmann 2012-06-14 10:44:22 -06:00
  • 0075099969 mixertx: tests RFFC5071/Lollipop Michael Ossmann 2012-06-14 10:40:37 -06:00
  • a1e2549ae1 troubleshooting RFFC5071 serial Michael Ossmann 2012-06-14 10:36:38 -06:00
  • 3c35e39e55 Clean up SGPIO TX code a little bit. Jared Boone 2012-06-13 22:00:37 -07:00
  • b5ec859eaf Remove comment of dead code. Jared Boone 2012-06-13 22:00:11 -07:00
  • 17446f6295 Add RX test, which receives data into a single slice. Jared Boone 2012-06-13 21:58:47 -07:00
  • b7a46af009 I was misusing SGPIO_CTRL_ENABLE. Instead, use SGPIO_CTRL_DISABLE to disable slices. Jared Boone 2012-06-13 21:54:48 -07:00
  • b9cde55f8c initial RFFC5071 support Michael Ossmann 2012-06-13 21:28:46 -06:00