Sojus07/hackrf
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339 Commits

Author SHA1 Message Date
TitanMKD
d46a59fba3 Fix for LPC4330 MCU frequency to be set to 204MHz instead of 102MHz. 2012-11-26 23:41:13 +01:00
TitanMKD
a453d161ab Fix problem with ".data" section which was not included, now it include all loadable section defined in elf. 2012-11-10 00:36:58 +01:00
TitanMKD
b8ede43963 Fix problem with .bin generated without .data section (only .text) !! 2012-11-09 22:18:25 +01:00
Jared Boone
cc5f1c61c7 Fix clock edge for TX mode. TX data was completely crapped up due to skew on my Jellybean/Lemondrop board. Hopefully, this also applies to Jawbreaker. I'll recheck once I have hardware in-hand. 2012-11-02 22:34:43 -07:00
Jared Boone
fc9632f19d Add code to control MAX2837 B1 through B7 from Jellybean. Another feeble attempt to control DC bias. 2012-10-17 22:28:10 -07:00
Jared Boone
143d845b05 Add code to control RXHP pin on MAX2837 (Jellybean only). I was hoping this would control the baseband DC offset problem, but no, it doesn't seem to help at all. 2012-10-17 21:48:41 -07:00
Jared Boone
549c943979 Add USB control of LPF baseband filter. 
Add max2837_set_lpf_bandwidth() function to choose available LPF filter bandwidth based on bandwidth in Hz.
Change configuration of MAX2837 to set LPF_EN and FT at max2837_setup(), not in max2837_rx() or max2837_tx() (which was overriding prior filter configuration).
 2012-10-17 17:00:36 -07:00
Jared Boone
9c4a0e94b0 Factor out sample_rate_set() from cpu_clock_init(). 
Implement switching between several supported sampling rates for Jellybean and Jawbreaker.
Commit bits of the Si5351C USB request support that I apparently missed in a prior commit.
 2012-10-17 16:57:26 -07:00
Jared Boone
6babcbe579 Add USB vendor requests to read/write Si5351C registers. 2012-10-17 11:57:44 -07:00
Jared Boone
7fdfde9314 Make use of i2c0_init() argument to control duty cycle, when APB1 clock shifts from IRC (~12MHz) to PLL1 (204MHz). 2012-10-17 11:48:35 -07:00
Jared Boone
63b1a25979 Consolidate a few clock setup tasks that repeat among many projects into cpu_clock_init(). 2012-10-17 11:45:30 -07:00
Will Code
334366aac3 Merge remote-tracking branch 'upstream/master' 2012-10-14 08:15:23 -04:00
Jared Boone
d398cfcc1d Use new ssp_transfer() function instead of ssp_write(). 
Implement max2837_spi_read().
 2012-10-13 16:58:22 -07:00
Jared Boone
5a428a460f Merge branch 'master' of https://github.com/mossmann/hackrf 2012-10-13 13:48:21 -07:00
Will Code
4c9df75d84 max2837: fix a couple math errors in the def file 2012-10-13 16:27:02 -04:00
Michael Ossmann
0d53da8593 fixed MAX2837 zero length register fields 2012-10-13 13:59:37 -06:00
Jared Boone
4cf0ba236d Extended common Makefile to include targets for DFU file generation and programming. 2012-10-13 12:29:03 -07:00
Jared Boone
57866227bf Remove weird LDSCRIPT that isn't necessary now. 
Change .bin generation to include only ROM-able sections.
TODO: Is there a better way to do the objcopy? It'd be great to put everything in the "rom" region into the .bin, instead of having to list out -j section for each of the sections that go to ROM.
 2012-10-13 11:37:54 -07:00
Jared Boone
168c92a3d0 Now that RxVGA gain control is working correctly, gain needs to be backed WAAAY off to get a usable capture in a fairly noisy 2.4GHz environment. 2012-10-13 11:07:17 -07:00
Jared Boone
f4b6f08500 Fixed incorrect field with for MAX2837 VGAgain_SPI_EN field. For boards that have no B7:B1 connections, this could prove extra problematic...and for boards that do, but aren't driving those pins from the LPC. 2012-10-13 11:06:39 -07:00
Jared Boone
9824a723b7 Moved invariant in sgpio_configure() loop out of loop. Originally, so I could use the value to calculate another invariant. 2012-10-12 09:45:18 -07:00
Jared Boone
a1af4356b6 Reworked sgpio.c to make use of #defines for fields, instead of hard-coding shifts. Proper. 2012-10-11 20:46:21 -07:00
Jared Boone
9b579232a7 Consolidated single-slice SGPIO configuration functions into single sgpio_configure() function. 2012-10-11 15:45:28 -07:00
Jared Boone
1bad2d8536 Consolidated two "deep" SGPIO configuration functions into one, qualified by transceiver mode (RX or TX). 95-ish % of the code was common. 2012-10-11 15:18:16 -07:00
Jared Boone
6f0fda0bee Moved transceiver_mode_t to hackrf_core.h. 
Changed transceiver_mode to volatile, since it's liable to be accessed at interrupt time.
 2012-10-11 15:12:25 -07:00
Jared Boone
8291d7fac0 Add SGPIO configuration function for "deep" (8-slice) TX mode. 2012-10-11 13:04:30 -07:00
Michael Ossmann
04160f49cc increased MAX2837 RX output common-mode voltage to maximum 2012-10-10 21:38:03 -06:00
Jared Boone
3a9d7432c3 Changed compile optimization flag to -Os from -O2. TitanMKD demonstrated conclusively that it's a good thing. 2012-10-10 16:27:05 -07:00
Jared Boone
8a54e09e15 Elimination of unused argument warnings. 2012-10-10 16:13:37 -07:00
Jared Boone
092c5b7b0f Removed removing of .usbram section from .bin file output. Because there's no more .usbram section! 2012-10-10 15:42:30 -07:00
Jared Boone
5989465eb9 Add SGPIO configuration API and code, extracted from existing SGPIO projects. 2012-10-10 14:30:28 -07:00
Jared Boone
39eb2682f9 Split ram_ahb memory region into two, with a 32K hole where the USB buffers live. 
Split ram region into two, representing the two local RAM buses.
Remove reference to usbram.ld, since it's no longer necessary.
 2012-10-10 14:27:21 -07:00
Jared Boone
f34e30510d Added fault handler header file, where I've defined the Cortex-M3/M4 SCB using a struct instead of a slew of #defines. This deviates from the libopencm3 method, but is superior in other ways. So, there you go. It's not in libopencm3, it's here. 
Added example (er, "reminder") code comment about registers to look at when debugging a Hard Fault.
 2012-10-10 13:36:10 -07:00
Jared Boone
685f5cdd6e More detail in comments about Jellybean/Lemondrop clock destinations. 2012-10-10 11:51:06 -07:00
Jared Boone
4f9a5a1ba4 Fix-ups to copyrights -- missing e-mail address and inconsistent formatting. 2012-10-06 19:14:55 -07:00
Jared Boone
900463ee5c Added fault handler code which can be optionally compiled/linked for debugging. 2012-10-06 17:35:11 -07:00
Jared Boone
f68fdaba7a Add .usbram section handling to linker scripts and makefile. 2012-10-06 17:33:17 -07:00
Jared Boone
182157a19c Add ram_ahb memory region to linker scripts. 2012-10-06 17:30:26 -07:00
Jared Boone
46f24d6f47 Remove ROM memory region from "ram_only" linker script. 2012-10-06 17:29:56 -07:00
Jared Boone
cf32fb96fe Merge branch 'master' of https://github.com/mossmann/hackrf 2012-10-03 09:26:30 -07:00
Michael Ossmann
d1aac9860a fixed jawbreaker MIX_BYPASS bug 2012-10-02 23:10:13 -06:00
Michael Ossmann
d6005d1cc5 fixed jawbreaker bug: different pin for SGPIO8 2012-10-02 17:51:05 -06:00
Michael Ossmann
11ade349d1 fixed jawbreaker bug: activate correct pin function for MIXER_SCLK 2012-10-02 16:21:17 -06:00
Michael Ossmann
c70d410394 reverted "rom" address to shadow area (allows same binary to be booted from SPIFI or USB/DFU) 2012-10-02 15:15:29 -06:00
Jared Boone
a975fbc577 Replaced apparently incorrect PLL0USB MDIV and NP_DIV values with values straight out of the User Manual's table 94. 2012-09-27 19:29:43 -07:00
Jared Boone
aaaf14819a Move PLL1/M4 CLK up to full speed (204MHz) in two steps, according to UM chapter 11.2.1. 2012-09-27 18:58:00 -07:00
Jared Boone
776c502628 More tweaks related to CGU #define changes. 2012-09-27 17:55:54 -07:00
Jared Boone
416cdc6b20 Added missing hackrf_core pin_setup() and enable_1v8_power(), which have somehow gone missing. 2012-09-27 16:26:47 -07:00
Jared Boone
ecb497aa97 Merge branch 'master' of https://github.com/mossmann/hackrf 
Conflicts:
	firmware/common/hackrf_core.c
 2012-09-27 14:58:31 -07:00
Michael Ossmann
df740440b0 fill lodiv register with n_lo, not lodiv variable (inconsistent naming is inherited from RFFC docs) 2012-09-20 16:52:38 -06:00