Michael Ossmann
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5364c91f7b
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hard coded 8 MHz baseband filter for now
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2012-08-23 09:52:16 -06:00 |
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Michael Ossmann
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cbd2d98c7d
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fixed bad output spectrum. problem was P3 = 0 in si5351c pll, similar to commit b595de647077f208c534e4efc0bce92f25378fb8
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2012-08-22 10:41:53 -06:00 |
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Jared Boone
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9f4f1d0b6b
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Bitband library, factored out of other code.
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2012-07-31 22:07:08 -07:00 |
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Jared Boone
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2a6e3a89d3
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USB performance test firmware project. It does absolutely nothing to start with, but at least the Makefile I just checked in won't blow up! :-)
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2012-07-31 22:05:28 -07:00 |
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Jared Boone
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33617e6701
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Makefile for all firmware projects.
TODO: There's still something broken about the *_rom_to_ram projects, but I'm not sure what it is yet...
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2012-07-31 22:03:58 -07:00 |
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Jared Boone
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f0e4cffb87
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Removed release_cpld_jtag_pins() and incorporated code into pin_setup().
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2012-07-31 22:03:01 -07:00 |
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Jared Boone
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79d352f17f
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Fixed Makefile breakage in blinky and blinky_rom_to_ram.
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2012-07-31 21:39:43 -07:00 |
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Jared Boone
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72ee83eda9
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Moving gpio_setup() / pin_setup() functions in separate projects to hackrf_core.h/c.
Moved enable_1v8_power() and release_cpld_jtag_pins() to hackrf_core.h/c.
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2012-07-31 21:38:57 -07:00 |
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Jared Boone
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9a8e5dcdf0
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Flip sense of capture clock on SGPIO, which seems to solve the RX data corruption issues. TODO: I wish I had more than empirical evidence that this fix is correct...
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2012-07-24 13:31:57 -07:00 |
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Jared Boone
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c8c0028d27
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Moved CGU peripheral and APB1 base clock configurations to before SSP1 configuration.
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2012-07-24 13:29:54 -07:00 |
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Jared Boone
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3593bee128
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Corrected typo regarding SGPIO external clock configuration.
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2012-07-24 13:29:03 -07:00 |
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Michael Ossmann
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fea87d8de5
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sgpio-rx test firmware
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2012-07-23 15:35:44 -06:00 |
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Jared Boone
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9f334fc5f0
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Simple support for MAX5864 configuration via SPI.
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2012-07-19 14:57:06 -07:00 |
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TitanMKD
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fab51038c0
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SGPIO Test with CPLD passthrough mode => work in progress because I have some hardware issues on my board.
For details on Hardware issues see Test_SGPIO0_to15.pdf or Test_SGPIO0_to15.ods
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2012-07-15 18:17:27 +02:00 |
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Michael Ossmann
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a784812100
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updated require connections
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2012-06-25 23:36:09 -06:00 |
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TitanMKD
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988b3e3a49
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Fixed simple systick example
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2012-06-25 22:45:18 +02:00 |
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TitanMKD
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bb12d3f601
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Example removed and replaced by startup_systick_perfo_rom_to_ram
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2012-06-25 22:34:29 +02:00 |
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TitanMKD
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53c7fcf768
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* Fixed linker script form SPIFI and RAM execution.
* Added performance checks and results on SPIFI & SRAM code execution.
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2012-06-25 22:15:10 +02:00 |
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TitanMKD
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dfb38a5a59
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Fix asm macro
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2012-06-25 22:02:55 +02:00 |
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Jared Boone
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2e16f51252
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Python program to verify logic on the Lollipop board.
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2012-06-19 23:09:42 -07:00 |
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Michael Ossmann
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ba909c0fe5
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MAX2837 TXVGA register bug fix
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2012-06-18 17:32:23 -06:00 |
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Jared Boone
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72e3dc1e21
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TX sample generation loop that outputs an eight-sample sine wave. (1.25MHz assuming 10MHz codec clock.)
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2012-06-15 16:20:46 -07:00 |
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Jared Boone
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bab6ec5fef
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Move buffer allocation to before enabling CPLD I/O, so as not to mess up I/Q synchronization.
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2012-06-15 16:16:05 -07:00 |
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Jared Boone
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e32a60495a
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Change initial TX output data to the neutral value (0x80).
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2012-06-15 16:14:58 -07:00 |
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Jared Boone
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59a5b92300
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Correct CPLD JTAG pin release code to properly tri-state the pins.
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2012-06-15 16:13:17 -07:00 |
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Jared Boone
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9a53fd3a07
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New CPLD .svf.
Change Si5351C CLK2 to 10MHz.
Keep CLK3 at 20MHz, but not inverted.
Source SGPIO8 from P1_12 instead of P9_6. (See "SGPIO Clock Routing") modification at https://github.com/mossmann/hackrf/wiki/Future-Hardware-Modifications ).
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2012-06-15 16:12:35 -07:00 |
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Jared Boone
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f0bf6dbf97
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Merge branch 'master' of https://github.com/mossmann/hackrf
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2012-06-15 15:11:16 -07:00 |
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Michael Ossmann
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10e20fbce2
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cut out serial test and do some actual mixing
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2012-06-14 22:00:27 -06:00 |
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Michael Ossmann
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b0ebd75188
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two-clocks-while-ENX-high fix for write operations, various example PLL configs
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2012-06-14 19:52:45 -06:00 |
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Jared Boone
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f53818a46f
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Additional calls to initialize SSP1, considering changes I committed minutes earlier.
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2012-06-14 13:09:02 -07:00 |
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Jared Boone
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570efc1361
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Added max2837_rx() function.
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2012-06-14 13:06:48 -07:00 |
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Jared Boone
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f08fc3bb51
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Pulled SSP1 configuration for MAX2837 into hackrf_core. Added SSP1 configuration for MAX5864. Added #defines for manipulating CS of both MAX parts. Changed a couple of #define names to be consistent with other names. Added explicit manipulation of MAX2837 CS via GPIO.
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2012-06-14 13:06:10 -07:00 |
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Jared Boone
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74ad447ec7
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More idiotic editor formatting fixup.
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2012-06-14 11:48:07 -07:00 |
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Michael Ossmann
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06b63d9936
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added two clocks while ENX high to get RFFC5071 serial reads to work (thanks, Jared!)
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2012-06-14 12:42:51 -06:00 |
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Jared Boone
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388cad86de
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Code to capture ADC data into a buffer using a tight loop on the M4.
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2012-06-14 11:31:11 -07:00 |
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Jared Boone
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878936645d
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Corrected my correction of my misunderstanding of how SGPIO_CTRL_ENABLE works. Turns out I *can* immediately disable a slice using ENABLE. If I want to synchronously disable a slice, I do it via DISABLE. And if I want to screw up my code, I (unwittingly) set all slices to synchronously disable, then configure SGPIO and watch my slices run once and stop. :-( All better now.
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2012-06-14 11:30:03 -07:00 |
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Jared Boone
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ef46b9b3b6
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Merge branch 'master' of https://github.com/mossmann/hackrf
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2012-06-14 10:01:35 -07:00 |
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Michael Ossmann
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2c76cc9bd2
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fixed pinout in README
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2012-06-14 10:46:55 -06:00 |
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Michael Ossmann
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68f9a1c6e4
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fixed inconsistent naming of mixer pins
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2012-06-14 10:44:22 -06:00 |
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Michael Ossmann
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0075099969
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mixertx: tests RFFC5071/Lollipop
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2012-06-14 10:40:37 -06:00 |
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Michael Ossmann
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a1e2549ae1
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troubleshooting RFFC5071 serial
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2012-06-14 10:36:38 -06:00 |
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Jared Boone
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3c35e39e55
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Clean up SGPIO TX code a little bit.
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2012-06-13 22:00:37 -07:00 |
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Jared Boone
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b5ec859eaf
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Remove comment of dead code.
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2012-06-13 22:00:11 -07:00 |
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Jared Boone
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17446f6295
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Add RX test, which receives data into a single slice.
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2012-06-13 21:58:47 -07:00 |
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Jared Boone
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b7a46af009
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I was misusing SGPIO_CTRL_ENABLE. Instead, use SGPIO_CTRL_DISABLE to disable slices.
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2012-06-13 21:54:48 -07:00 |
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Michael Ossmann
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b9cde55f8c
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initial RFFC5071 support
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2012-06-13 21:28:46 -06:00 |
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Michael Ossmann
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b54ec7e0ab
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Merge branch 'master' of github.com:mossmann/hackrf
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2012-06-13 21:23:47 -06:00 |
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Michael Ossmann
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25c3f6729d
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Merge branch 'jboone-master'
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2012-06-13 21:23:10 -06:00 |
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Michael Ossmann
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ad080a355a
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pull request #10, resolved conflicts
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2012-06-13 21:21:34 -06:00 |
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Michael Ossmann
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10cebd1f83
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RFFC5071 pin defs
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2012-06-13 21:08:07 -06:00 |
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