hackrf

History

Jared Boone 9a53fd3a07 New CPLD .svf.

Change Si5351C CLK2 to 10MHz.
Keep CLK3 at 20MHz, but not inverted.
Source SGPIO8 from P1_12 instead of P9_6. (See "SGPIO Clock Routing") modification at https://github.com/mossmann/hackrf/wiki/Future-Hardware-Modifications ).

2012-06-15 16:12:35 -07:00

blinky

Added ROM to RAM code copy & exec => Warning requires latest version of libopencm3 !!

2012-06-10 11:46:55 +02:00

blinky_rom_to_ram

Added ROM to RAM code copy & exec => Warning requires latest version of libopencm3 !!

2012-06-10 11:46:55 +02:00

common

New CPLD .svf.

2012-06-15 16:12:35 -07:00

mixertx

Merge branch 'master' of https://github.com/mossmann/hackrf

2012-06-15 15:11:16 -07:00

sgpio

More idiotic editor formatting fixup.

2012-06-14 11:48:07 -07:00

simpletx

Pulled SSP1 configuration for MAX2837 into hackrf_core. Added SSP1 configuration for MAX5864. Added #defines for manipulating CS of both MAX parts. Changed a couple of #define names to be consistent with other names. Added explicit manipulation of MAX2837 CS via GPIO.

2012-06-14 13:06:10 -07:00

startup

Fixed Clock Init (to be tested on other board).

2012-06-08 02:24:05 +02:00

startup_systick

LPCXpresso IDE Flash/Debug Tutorial for LPC43xx SPIFI

2012-06-14 01:09:04 +02:00

startup_systick_rom_to_ram

Startup & Performance test using SysTick Timer.

2012-06-11 22:39:22 +02:00

README

libopencm3 dependency note

2012-06-07 08:25:43 -06:00

README

The firmware is set up for compilation with the GCC toolchain available here:

https://code.launchpad.net/gcc-arm-embedded

Required dependency:

https://github.com/mossmann/libopencm3