Jared Boone
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f51ee2dc61
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Modified ldscripts to more accurately represent LPC4330 hardware.
Moved M0 RAM from local to AHB.
Created separate region for sleep RAM.
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2013-12-07 15:29:50 -08:00 |
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Jared Boone
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c365d0a37e
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Add memory regions for M0 code to live. In the "rom_to_ram" (SPIFI) version, put M0 binary in ROM. In the RAM version, put M0 code in the destination RAM region.
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2013-11-20 15:14:13 -08:00 |
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Jared Boone
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43596e07c5
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Break off a chunk of local RAM to serve the M0 processor.
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2013-09-20 20:03:24 -07:00 |
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Jared Boone
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39eb2682f9
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Split ram_ahb memory region into two, with a 32K hole where the USB buffers live.
Split ram region into two, representing the two local RAM buses.
Remove reference to usbram.ld, since it's no longer necessary.
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2012-10-10 14:27:21 -07:00 |
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Jared Boone
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f68fdaba7a
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Add .usbram section handling to linker scripts and makefile.
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2012-10-06 17:33:17 -07:00 |
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Jared Boone
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182157a19c
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Add ram_ahb memory region to linker scripts.
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2012-10-06 17:30:26 -07:00 |
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Michael Ossmann
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c70d410394
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reverted "rom" address to shadow area (allows same binary to be booted from SPIFI or USB/DFU)
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2012-10-02 15:15:29 -06:00 |
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TitanMKD
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53c7fcf768
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* Fixed linker script form SPIFI and RAM execution.
* Added performance checks and results on SPIFI & SRAM code execution.
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2012-06-25 22:15:10 +02:00 |
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Michael Ossmann
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aeced361cf
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migrated common stuff to libopencm3
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2012-06-07 08:14:16 -06:00 |
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Michael Ossmann
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a748e31328
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started firmware directory with some basic stuff
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2012-05-21 11:33:46 -06:00 |
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