Michael Ossmann
bef5835d54
USB, regulator layout
2013-11-01 18:10:49 -06:00
Michael Ossmann
4af6b1688b
LPC4320 placed
2013-11-01 16:53:22 -06:00
Michael Ossmann
52c7f3297b
CPLD layout
2013-11-01 00:03:15 -06:00
Michael Ossmann
c7d8636858
hopeful Si5351C placement
2013-10-31 23:04:19 -06:00
Michael Ossmann
aff2a579e3
MAX5864 layout, rearranged analog baseband headers
2013-10-31 22:44:55 -06:00
Michael Ossmann
17e469c979
analog baseband headers
2013-10-31 21:45:34 -06:00
Michael Ossmann
567417df04
RF section front side finished
2013-10-31 21:18:42 -06:00
Michael Ossmann
551e850550
more RF layout
2013-10-29 18:30:12 -06:00
Michael Ossmann
565a821e92
RF section rough component positions
2013-10-29 17:50:57 -06:00
Michael Ossmann
dbcb2b3550
started RF layout
2013-10-29 15:16:02 -06:00
Michael Ossmann
dccb8ee552
BMI-S-230 RF shield module
2013-10-28 18:46:37 -06:00
Michael Ossmann
60e66317d7
new board outline
2013-10-28 18:21:48 -06:00
Michael Ossmann
e87234b8f9
big import of updates into pcbnew
2013-10-28 18:00:17 -06:00
Michael Ossmann
c6bacf0e21
module selection update to agree with recent schematic changes
2013-10-28 17:06:49 -06:00
Michael Ossmann
bd75823536
USB-MICROB-FCI-10103594 module: decreased drill sizes
2013-10-28 16:28:57 -06:00
Michael Ossmann
6c7352b797
QFN32 (RFFC5072) module: increased pad length by 50%
2013-10-28 16:07:20 -06:00
Michael Ossmann
e87529df8b
QFN20-4 (Si5351C) module: increased pad width a bit
2013-10-28 15:40:59 -06:00
Michael Ossmann
62e4176953
QFN20-4 (Si5351C) module: increased pad length by 50%
2013-10-28 15:33:14 -06:00
Michael Ossmann
25aaa2a881
SKY13350 module: doubled pad size
2013-10-28 15:22:29 -06:00
Michael Ossmann
a90a57c5b9
SKY13317 module: increased pad length by 50%
2013-10-28 15:07:14 -06:00
Michael Ossmann
7bfd46597b
USB0_ID pull-up
2013-10-25 18:15:19 -06:00
Michael Ossmann
0d59261ae3
removed RF switch logic ICs, replaced with direct GPIO
2013-10-25 18:05:03 -06:00
Michael Ossmann
beccc70ad6
change to LPC4320
2013-10-25 17:17:37 -06:00
Michael Ossmann
e872bc45a9
broke out more I2S0 pins
2013-10-25 17:14:14 -06:00
Michael Ossmann
70a87a86aa
added I2C1 to SSP0 header (all expansion headers are subject to rearranging during layout)
2013-10-25 17:02:19 -06:00
Michael Ossmann
1176bfe7e8
SSP0 header
2013-10-25 15:55:17 -06:00
Michael Ossmann
b4e3d59ae4
VBUS header
2013-10-25 15:12:55 -06:00
Michael Ossmann
e279702915
connected USB0 ID pin
2013-10-25 14:35:09 -06:00
Michael Ossmann
3ab5e3b991
high side switch for VAA (RF section power supply)
2013-10-25 14:24:27 -06:00
Michael Ossmann
3b07a93eea
RTC expansion
2013-10-25 13:47:43 -06:00
Michael Ossmann
d5fbf35545
fixed all clock generator output supplies to VCC
2013-10-24 14:56:34 -06:00
Michael Ossmann
cbd3295cb3
fixed clock input and output to 3.3V CMOS
2013-10-24 14:42:03 -06:00
Michael Ossmann
0de2298d77
optional RTC XTAL
2013-09-29 21:21:50 -06:00
Michael Ossmann
40406e52ad
removed more DNP parts
2013-09-29 20:54:36 -06:00
Michael Ossmann
cda1462fff
regulator feedback fix
2013-09-29 20:47:32 -06:00
Michael Ossmann
c2ae30dd4b
removed PCB antenna
2013-09-29 20:42:20 -06:00
Michael Ossmann
2626e1814d
fixed MAX5864 OVDD to VCC
2013-09-29 19:19:03 -06:00
Michael Ossmann
a9026c521f
fixed VCCIO1 to VCC
2013-09-29 19:08:04 -06:00
Michael Ossmann
6212a4ef5e
removed U3 test points (there is another UART exposed on the ISP header)
2013-09-29 18:58:25 -06:00
Michael Ossmann
e9e6486c0c
removed USB LEDs
2013-09-29 18:55:54 -06:00
Michael Ossmann
dae8820357
removed some DNP parts and 0 ohm resistors
2013-09-29 18:55:01 -06:00
Michael Ossmann
f78bb74dd9
removed boot headers, added reset and DFU pushbuttons
2013-09-29 18:47:39 -06:00
Michael Ossmann
822b0e73fc
HackRF One: started hardware design by copying Jawbreaker
2013-09-29 18:33:34 -06:00
Michael Ossmann
4c26e43117
C116 update
2013-06-09 23:40:25 -06:00
Michael Ossmann
9276b9e89a
moved cpld stuff out of hardware/jellybean where people would be unlikely to look for it
2013-05-18 09:48:37 -06:00
Michael Ossmann
e900252d28
Merge pull request #43 from TitanMKD/master
...
HackRF IQ fix for CPLD and LPC4330 usb_performance
2013-04-04 11:16:41 -07:00
Michael Ossmann
978663d707
minor bom/dnp tweaks
2013-04-04 12:13:35 -06:00
TitanMKD
294e958472
sgpio_if (top.vhd) CPLD VHDL fix for IQ/aliasing problems for ADC. (cpldjtagprog => sgpio_if_xsvf.h updated to rebuild).
...
usb_performance.c SGPIO IQ fix for ADC (QI->IQ) for new CPLD (use usb_performance_rom_to_ram version else there is some packet lost even at 10Mhz sampling rate => make -f Makefile_rom_to_ram.)
2013-04-04 19:43:30 +02:00
TitanMKD
fa47f8af8c
Fix for IQ problem for ADC:
...
RX samples are ordered I0,Q1,I1,Q2,I2,... where they should be I0,Q0,I1,Q1,I2,Q2,...
This fix also alias/ghost problems to be confirmed on other boards/more tests...
Drawback now IQ is QI, will be fixed/swapped in LPC4330 SGPIO code.
2013-04-04 00:55:51 +02:00
Michael Ossmann
0c342f9cea
.gitignore additions: .dfu in /firmware, .pdf and .svg in /hardware
2013-03-07 14:56:32 -07:00
