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194 Commits

Author SHA1 Message Date
Hoernchen
b33f534da0 firmware, lib: update comments, doc 2013-06-17 12:32:12 +02:00
Hoernchen
839a1a170f fw: dc offset correction fix 
pins b7 & b6 are floating, disable re-triggering
selecting a different HPC_STOP fixes the dc offset drift
disabling and enabling rx/tx after tuning triggers the dc offset
correction
 2013-06-16 20:26:02 +02:00
Hoernchen
8063bd8207 firmware: if precision 2013-06-16 20:24:32 +02:00
Hoernchen
bee537dc01 firmware: rffc frac, if gain 2013-06-16 20:23:47 +02:00
Hoernchen
8f55436cd1 firmware: fix a warning 2013-06-09 09:15:35 -06:00
Hoernchen
deafbab9fc lib: make sure to tell the linker that we're hardfloat, or it will choose the wrong libgcc.a... 2013-06-09 00:10:05 +02:00
Sylvain Munaut
f0c7fe66f1 firmware: New fractional sample rate algorithm and usb command 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2013-06-09 00:08:18 +02:00
Hoernchen
1e326997ed firmware: enable int mode if div is even integer 
to improve jitter performance
 2013-06-07 23:10:35 +02:00
Hoernchen
1925649a01 firmware: fractional sample rates 2013-06-07 14:29:14 +02:00
Sylvain Munaut
472bcd414a firmware/build: Use gnu99 coding convention 
C99 doesn't require/support anonymous struct/unions in some GCC versions
and those are used a lot.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2013-06-06 22:52:40 +02:00
Hoernchen
a95f49b543 disable si clock to lpc 
leaving it on but unused causes major spurs to appear all over the
place..
 2013-06-05 17:35:01 +02:00
Hoernchen
b6a0b09b1d firmware: remove 5mhz option 2013-05-29 17:47:02 +02:00
Hoernchen
7f6a730c6e si clock for the lpc 2013-05-29 17:12:06 +02:00
Hoernchen
233c56c79d libhackrf/firmware: merge txvga gain into one gain range of 0-47 2013-05-29 00:53:41 +02:00
Hoernchen
19e8628650 firmware: fix plus 16db tx gain 2013-05-27 15:28:51 +02:00
Hoernchen
abc3cd1f4f firmware: gain control 2013-05-27 14:01:22 +02:00
Michael Ossmann
60d21a3310 commenting out CGU_PLL1_CTRL_DIRECT=1 because it breaks boot from spifi 2013-05-11 18:55:00 -06:00
Jared Boone
1723cd12a1 Oops, read PLL1 documentation again. Looks like FBSEL=1 is for "normal operation". So include that, but use DIRECT=1 to skip the PSEL divider (which would prevent us producing 204MHz from an in-spec PLL frequency). 2013-05-11 12:25:54 -07:00
Jared Boone
e065cdfe20 Slowed down edges on LED and power enable signals -- they don't need to be fast, and this *might* have a negligible but positive effect on noise. 2013-05-11 12:13:00 -07:00
Jared Boone
d9884af8b8 PLL1 was misconfigured to run at 408MHz (way out of spec) instead of 204MHz. Corrected this by using DIRECT=1 instead of FBSEL=1. 2013-05-11 12:11:37 -07:00
Jared Boone
a4a2a3d6ba Added SCU pinmux data for USB LEDs, configured USB LEDs to be outputs (not float). 2013-05-11 08:09:07 -07:00
TitanMKD
8777f93721 Cleanup on xxx_rom_to_ram directory now it contains only makefile, removed redundant .c file from xxx dir. 
Fixed IAP "IAP_CMD_READ_SERIAL_NO" for LPC43xx flashless part not supporting IAP by using SPIFI w25q80bv Unique ID(64bits).
Fixed SPIFI erase/program also now it with check SPIFI w25q80bv Device ID = 0x13 at start of w25q80bv_setup()/w25q80bv_chip_erase()/w25q80bv_program().
 2013-04-07 18:55:12 +02:00
TitanMKD
b8590db02a Comment fix. 2013-04-04 19:48:28 +02:00
TitanMKD
118953b451 Lot of comments added. 2013-04-04 19:19:59 +02:00
TitanMKD
31356cc998 Merge branch 'master' of git://github.com/mossmann/hackrf 
Conflicts:
	host/libhackrf/examples/hackrf_transfer.c
Fixed conflict with cleanup and fixed bug on 64bits value.
 2013-03-24 09:56:56 +01:00
Michael Ossmann
9f5057d154 renamed LPC4330_M4_ROM_to_RAM.ld for case sensitive platforms like mine 2013-03-23 10:02:06 -06:00
TitanMKD
d509489fff ssp1_set_mode_max2837()/void ssp1_set_mode_max5864(void) SPI speed updated to 4.857MHz instead of 0.0498MHz 
To do test it to check there is no problem.
 2013-03-20 22:20:47 +01:00
TitanMKD
7836911c45 fault_handler add more info in case of crash. 2013-03-10 14:23:26 +01:00
TitanMKD
6620fe6ba9 Add host(hackrf_info)/fw(usb_performance) IAP read part id/serial no(to be confirmed). 2013-03-09 11:47:28 +01:00
Michael Ossmann
1a2f871520 moved set_freq out of hackrf_core to facilitate switchctrl fixes 2013-03-07 17:35:48 -07:00
Michael Ossmann
052d842f36 temporary fix for gpo/switchctrl. only works for TX 2013-03-07 16:56:44 -07:00
TitanMKD
e3784c886e set_freq for firmware & host. tested basicly checking with debugger value mhz/hz from host to fw. 2013-03-07 23:24:00 +01:00
TitanMKD
f9d72a7f87 Merge branch 'master' of git://github.com/mossmann/hackrf 2013-03-07 21:32:56 +01:00
Michael Ossmann
155a688d11 updated rffc test/commments 2013-03-07 10:35:49 -07:00
TitanMKD
e2c05fbfe2 Draft in progress (not tested at all) set_freq(). 2013-02-26 00:17:18 +01:00
Michael Ossmann
85dfc2a930 implemented transceiver mode OFF 2013-02-24 15:13:39 -07:00
Michael Ossmann
771b93fe62 increased rffc5071 serial speed 2013-02-24 14:25:51 -07:00
Michael Ossmann
a74cd9fdf9 clear MAX2837 RXENABLE when going into TX mode and vice versa 2013-02-24 10:17:50 -07:00
Michael Ossmann
79587574b4 Merge pull request #31 from TitanMKD/master 
jtagprog fixed for test
 2013-02-23 10:26:05 -08:00
TitanMKD
0afc0813bf jtagprog fixed. (to be checked by reading back the CPLD to be sure of the programming). 2013-02-23 18:52:56 +01:00
Michael Ossmann
d2b35517b3 firmware version string 2013-02-23 10:22:58 -07:00
Michael Ossmann
0874f9fe19 speed up SPI flash data rate 2013-02-22 18:42:17 -07:00
Michael Ossmann
653599ee9d test program to program CPLD from microcontroller 2013-02-16 07:23:04 -07:00
Michael Ossmann
1b7eeaf83b removed defunct lpc43.h 2013-02-14 17:52:52 -07:00
Michael Ossmann
6cf1721a28 cleanup 2013-02-14 17:52:29 -07:00
Michael Ossmann
415c364db1 attempted to implement waitTime() properly - not really sure 2013-02-14 17:43:28 -07:00
Michael Ossmann
907325aa12 CPLD JTAG GPIO 2013-02-14 17:23:45 -07:00
Michael Ossmann
de69b1f290 turned off debug mode 2013-02-14 16:55:24 -07:00
Michael Ossmann
23883aacce tuned lenval.h MAX_LEN for CoolRunner/II 2013-02-14 16:04:20 -07:00
Michael Ossmann
435de16c02 source code from XAPP058 for CPLD programming from the microcontroller 2013-02-14 15:59:54 -07:00