Jared Boone
64656d1e92
SGPIO passthrough CPLD project, for TitanMKD's testing.
2012-07-02 11:30:44 -07:00
Jared Boone
9a53fd3a07
New CPLD .svf.
...
Change Si5351C CLK2 to 10MHz.
Keep CLK3 at 20MHz, but not inverted.
Source SGPIO8 from P1_12 instead of P9_6. (See "SGPIO Clock Routing") modification at https://github.com/mossmann/hackrf/wiki/Future-Hardware-Modifications ).
2012-06-15 16:12:35 -07:00
Jared Boone
d68036f79d
Eliminate ill-conceived HOST_CLK from CPLD.
...
Rearrange clocks to not use AC-coupled CLK1 from Si5351C.
Move CODEC_CLK to GCLK1, CODEC_X2_CLK (now HOST_CLK, too) to GCLK2.
Add trace on Jellybean PCB to connect GCLK2 to LPC4330 pin 56 (P1_12) -- a different SGPIO8.
2012-06-14 19:08:20 -07:00
Jared Boone
9c50b7de26
Updated SVF from committed project files.
2012-06-09 22:34:32 -07:00
Jared Boone
89314d40d6
Added Bus Blaster programming script. Added README explaining project contents and programming process.
2012-06-09 22:34:01 -07:00
Jared Boone
07b6f81a6c
Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.
2012-06-09 22:02:45 -07:00
TitanMKD
ba1880799a
JellyBean TSP62410 computation theory for output voltage.
2012-05-29 23:11:14 +02:00
TitanMKD
a27210c034
Added JellyBean Pin to be used with NXP http://www.lpcware.com/content/nxpfile/lpc43xx-pin-mux-tool
2012-05-29 23:08:50 +02:00
TitanMKD
ba14f7e539
Fix jellybean_BOM.ods with 3.3V fix.
2012-05-29 23:05:28 +02:00
TitanMKD
71879fc05f
JellyBean BOM with DigiKey Part Number
2012-05-28 11:41:41 +02:00
Michael Ossmann
4d90cd6d0a
big bom update
2012-04-16 16:29:46 -06:00
Michael Ossmann
4e92238470
gerber options
2012-04-16 09:33:39 -06:00
Michael Ossmann
d1420be69e
silkscreen
2012-04-16 09:31:45 -06:00
Michael Ossmann
10da64fc19
flipped boot control headers around
2012-04-16 08:49:12 -06:00
Michael Ossmann
f149b3485c
pinned down some zones that were flapping in the breeze
2012-04-15 23:57:32 -06:00
Michael Ossmann
93ac88aa92
finished tracks
2012-04-15 23:41:26 -06:00
Michael Ossmann
edaf103f05
finalized pcb edges
2012-04-15 22:26:39 -06:00
Michael Ossmann
7ebfccba89
more tracks
2012-04-15 21:59:14 -06:00
Michael Ossmann
8835b89201
P9, P12 tracks
2012-04-15 18:09:37 -06:00
Michael Ossmann
819547fa9e
LPC JTAG tracks
2012-04-15 17:21:08 -06:00
Michael Ossmann
3fa0e48466
USB, regulator tracks
2012-04-15 17:09:50 -06:00
Michael Ossmann
5369d87fe7
CPLD tracks
2012-04-15 16:16:23 -06:00
Michael Ossmann
9dd9d3c9ec
P13 tracks
2012-04-15 11:48:41 -06:00
Michael Ossmann
4e2e5a765b
improved regulator placement
2012-04-15 11:19:39 -06:00
Michael Ossmann
d3ccd95641
placed a bunch of passives
2012-04-15 10:19:38 -06:00
Michael Ossmann
4ba3e7b911
fixed VCCIO1 caps
2012-04-15 09:43:46 -06:00
Michael Ossmann
e5ed28dafb
more positions
2012-04-15 01:15:23 -06:00
Michael Ossmann
f1fb3abbaf
very rough positions
2012-04-15 01:00:32 -06:00
Michael Ossmann
b463ddd7fb
modules on layout
2012-04-15 00:21:52 -06:00
Michael Ossmann
947fcb9776
module selection
2012-04-15 00:12:49 -06:00
Michael Ossmann
dd3ad76a79
rearranged USB LEDs for easier experimentation
2012-04-12 23:16:33 -06:00
Michael Ossmann
949b0833d1
fixed some things Jared noticed
2012-04-12 22:45:36 -06:00
Michael Ossmann
f7ab0e7b9f
some BOM details
2012-04-10 08:41:40 -06:00
Michael Ossmann
67e4518b28
cosmetic cleanup
2012-04-09 23:44:04 -06:00
Michael Ossmann
3d5c577403
annotation
2012-04-09 23:35:13 -06:00
Michael Ossmann
a7debf80c3
VBUS voltage divider per errata sheet
2012-04-09 23:27:51 -06:00
Michael Ossmann
2925906ded
indicator LEDs
2012-04-09 23:22:06 -06:00
Michael Ossmann
536e4cf022
I2S header
2012-04-09 23:12:51 -06:00
Michael Ossmann
1453150ffd
oops. had some stuff backwards
2012-04-09 22:03:26 -06:00
Michael Ossmann
4800dd5477
ESD protect USB ID pin
2012-04-09 21:59:31 -06:00
Michael Ossmann
648b7b25fc
LPC AUX header improvement
2012-04-09 21:38:08 -06:00
Michael Ossmann
47ecbe3f79
LPC AUX headers
2012-04-09 18:58:57 -06:00
Michael Ossmann
e3582de51e
CPLD AUX headers
2012-04-09 18:17:18 -06:00
Michael Ossmann
0bc57c9e8d
connectors for cables extending to lemondrop
2012-04-09 18:00:24 -06:00
Michael Ossmann
a571819f29
power headers
2012-04-09 15:57:42 -06:00
Michael Ossmann
456509b536
CPLD JTAG
2012-04-09 10:36:55 -06:00
Michael Ossmann
7510c1065c
labeled SCT pins for expansion
2012-04-09 00:06:00 -06:00
Michael Ossmann
0ece25c73e
rearranged some pins
2012-04-08 23:14:24 -06:00
Michael Ossmann
d3b722aef9
SPI flash
2012-04-08 22:01:46 -06:00
Michael Ossmann
19ee261d9d
better resistor selection for 2.7 V
2012-04-08 21:30:26 -06:00
