Sojus07/hackrf
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249 Commits

Author SHA1 Message Date
Jared Boone
50ec268794 Bracket SGPIO GPDMA slice configuration with multislice==false test. It only makes sense in single slice mode (until I have a clever idea for doing GPDMA with multiple slices). 2013-12-08 12:14:00 -08:00
Jared Boone
809df425c1 Add SGPIO configuration to support GPDMA interrupts. 2013-12-08 11:54:50 -08:00
Jared Boone
45c0a6c31a Extract/isolate path details in Makefile_inc.mk. 2013-12-08 11:33:47 -08:00
Jared Boone
f51ee2dc61 Modified ldscripts to more accurately represent LPC4330 hardware. 
Moved M0 RAM from local to AHB.
Created separate region for sleep RAM.
 2013-12-07 15:29:50 -08:00
Jared Boone
34b01d89af Add SGPIO DMA configuration code. 2013-12-07 15:29:14 -08:00
Jared Boone
3e7ff530d7 Add GPDMA API. Should go in libopencm3 when it's more fleshed-out. 2013-12-07 15:28:59 -08:00
Jared Boone
5468a01a9b Forgot to include rf_path.h now that its pin setup is called from hackrf_core. 2013-11-21 10:23:53 -08:00
Jared Boone
b285b91e4c Merge remote-tracking branch 'mossmann/master' into jboone_refactor_20130906 
Conflicts:
	firmware/common/hackrf_core.h
	firmware/common/rffc5071.c
 2013-11-20 18:43:40 -08:00
Jared Boone
9db166427f Remove I2S pin definitions, since they're too specific for generic/shared HackRF code. 2013-11-20 15:46:53 -08:00
Jared Boone
986e4dec93 Massive rework of Makefile_inc.mk, to support building of heterogeneous (M4+M0) binaries, and easy switching between RAM and SPIFI-bootable builds. Constructive criticism welcome -- I'm sure there's better ways to do this. 2013-11-20 15:28:28 -08:00
Jared Boone
c365d0a37e Add memory regions for M0 code to live. In the "rom_to_ram" (SPIFI) version, put M0 binary in ROM. In the RAM version, put M0 code in the destination RAM region. 2013-11-20 15:14:13 -08:00
Jared Boone
31a55d0e9b Assembly file that includes M0 binary into a .o to be linked into the M4 binary. There's certainly a more elegant way, but for now... 2013-11-20 15:13:18 -08:00
Jared Boone
e29ec6b084 Add default M0 code that just loops forever, if a project doesn't specify any SRC_M0_[CS] files. 2013-11-20 15:11:54 -08:00
Jared Boone
91a7ca4983 Fix return value on SGPIO decimation function. 2013-11-20 15:08:59 -08:00
Jared Boone
e3f9e204c1 Relocate SGPIO pin configuration -- it only needs to be done once. 2013-11-20 13:22:19 -08:00
Jared Boone
39276f162c Add M0 linker script. 2013-11-19 19:52:50 -08:00
Jared Boone
3bf6573dc6 Add skip-every-N function to CPLD, where N is controlled by three input pins from the microcontroller. 
Updated SGPIO CPLD testbench, as it had fallen a bit out of date.
Add SGPIO API initialization and control of CPLD decimation feature.
 2013-11-19 19:52:06 -08:00
Michael Ossmann
5b14636c2c initial firmware support for HackRF One 2013-11-19 10:01:26 -07:00
Jared Boone
967e699815 Another little fix for the two's complement change -- initialize SGPIO data registers to DAC zero values. 2013-11-17 22:23:08 -08:00
Jared Boone
9856ea3d14 Changes due to CGU header API changes. 2013-11-15 11:41:20 -08:00
Jared Boone
06da7fd83a Reduce drive strength from clock generator (Si5351C) to first mixer (RFFC5072). This reduces every-50MHz spurs in RX by 10 to 15dB. 2013-09-22 11:54:37 -07:00
Jared Boone
314b3cdc7b Don't put MAX2837 into shutdown mode -- powering up takes a bit too long (500us for PLL to stabilize). Will need to revisit, because the MAX2837 chews up significant current (35 to 45mA) when not in shutdown. 
Remove excess calls to max2837_start() and max2837_stop().
 2013-09-22 11:52:45 -07:00
Jared Boone
b4f883595f Remove MAX2837_FREQ_NOMINAL_MHZ #define -- it must be updated now that IF is adjustable. So I pushed the calculation directly into the two places it was used. 2013-09-21 20:27:27 -07:00
Jared Boone
6901107c7f Adjust Makefile_inc.mk to serve both M0 and M4 targets through the LPC43XX_TARGET variable. 2013-09-20 20:04:28 -07:00
Jared Boone
43596e07c5 Break off a chunk of local RAM to serve the M0 processor. 2013-09-20 20:03:24 -07:00
Jared Boone
e2d4a501be Link floating point library and related/required libraries. 2013-09-20 15:08:23 -07:00
Jared Boone
322dea1884 Add make target for .s files. 2013-09-20 15:07:42 -07:00
Jared Boone
5c76b0ff50 Add miscellaneous Jawbreaker pins SCU #defines. 2013-09-20 14:19:07 -07:00
Jared Boone
7b50dfa12c Factor out USB API for transceiver control into separate files. 
Pull out streaming control functions into common/streaming.[ch].
Remove excess #includes in hackrf_usb.c.
 2013-09-20 12:54:56 -07:00
Jared Boone
82ce660932 Broke some application-specific USB code into separate files within hackrf_usb/. Hoping I can use them as necessary in other projects, or push them into a library eventually. 2013-09-19 19:51:32 -07:00
Jared Boone
c06facdd25 Push SGPIO configuration into RF path API. 2013-09-17 22:32:10 -07:00
Jared Boone
2e2275ed51 Pull out leaky tri-state transceiver_mode value from sgpio_configure(), replace with SGPIO_DIRECTION_* #defines. 2013-09-17 22:29:41 -07:00
Jared Boone
76704be008 Remove unused local variable causing a compiler warning. 2013-09-17 22:21:11 -07:00
Jared Boone
04e70483a2 Move RF path configuration to early in the tuning process -- before the MAX2837 is tuned. 2013-09-17 21:59:01 -07:00
Jared Boone
1ec9f560b4 Move more RF path stuff (initialization and MAX5864 state management) into rf_path.c. 
Changed initial RF path mode to lowest power (OFF).
Remove initial MAX2837 IF setting -- it's a waste of effort when the first (and necessary) tuning operation will reset it anyway (perhaps to a different value).
 2013-09-17 17:25:00 -07:00
Jared Boone
b92e916b21 Forgot an #include in rf_path.c, from moving MAX2837 code. 2013-09-17 15:36:59 -07:00
Jared Boone
52dda32a18 Adjust logic in sgpio_configure() to treat transceiver modes outside TX and RX as RX. "OFF", for example... 2013-09-17 15:32:11 -07:00
Jared Boone
0e8e3c8d53 Push MAX2837 state management into rf_path_set_direction(). 2013-09-17 15:27:16 -07:00
Jared Boone
e02d2f0325 Remove dependencies on application-specific USB descriptors. 2013-09-17 15:13:12 -07:00
Jared Boone
fe2a700f8f Move files that have no application-specific bits (e.g. USB stack, tuning, and RF path APIs) to ../common/. 2013-09-17 15:10:46 -07:00
Jared Boone
78121f5a3e Merge branch 'refs/heads/bgamari_usb_merge' into jboone_refactor_20130906 
Conflicts:
	firmware/hackrf_usb/hackrf_usb.c
 2013-09-17 13:10:30 -07:00
Jared Boone
c0274cd2d3 Merge remote-tracking branch 'bgamari/usb' into bgamari_usb_merge 
Conflicts:
	firmware/hackrf_usb/hackrf_usb.c
	firmware/hackrf_usb/usb.c
	firmware/hackrf_usb/usb_queue.c
	firmware/hackrf_usb/usb_queue.h
	firmware/hackrf_usb/usb_standard_request.c
 2013-09-16 15:18:14 -07:00
Ben Gamari
dc9c6c9667 cpld: Stream CPLD data from host 
Previously CPLD programming involved a large 64kbyte buffer into which
the the entire bitstream would be completely downloaded, and at which
point the programming process would commence. This is needlessly
wasteful of memory. Moreover, it could lead to USB timeouts as the
firmware needs to wait the entire duration of the programming process
before returning an ACK to the host after the final SETUP data phase
packet.

Instead, we now receive 512 byte chunks of the bitstream and stream them
to the CPLD one at a time. We wait for each packet to be streamed out to
the CPLD before ACKing the packet to prevent active data being
overwritten.
 2013-09-14 18:24:25 -04:00
Ben Gamari
d2b2b11998 xapp058/ports: Clean up comments and dead code 
It's still not pretty but it's an improvement
 2013-09-14 18:24:25 -04:00
Jared Boone
bafe97e302 Extract knowledge of RF path configurations from the RFFC5071 driver. 
Change initial RF path mode to SWITCHCTRL_SAFE. (Previously started at SWITCHCTRL_SAFE and then immediately switched to SWITCHCTRL_AMP_BYPASS.)
 2013-09-07 12:59:57 -07:00
Jared Boone
518c46a111 Oops, missed a spot where I should've called a MAX2837 mode function. 2013-09-06 23:09:29 -07:00
Jared Boone
a367f84d15 Add MAX2837 mode set/get functions. 2013-09-06 22:29:57 -07:00
Jared Boone
a5c0b5deeb Add MAX2837 functions to control operating mode. 
Replace direct manipulation of GPIOs controlling MAX2837 with operating mode functions.
 2013-09-06 21:29:31 -07:00
Jared Boone
d76d72665e Adjusted cpu_clock_pll1_low_speed() to operate at 48MHz, as per several comments with the code. The actual MSEL value was previously selecting 84MHz. 2013-09-04 16:23:32 -07:00
Jared Boone
237bf6ecdb Pulled redundant PLL1 initialization code from cpu_clock_init(). Called cpu_clock_pll1_low_speed() instead. 2013-09-04 16:22:41 -07:00