Sojus07/hackrf
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
1,503 Commits 1 Branch 0 Tags
Commit Graph

80 Commits

Author SHA1 Message Date
Jared Boone
32aea14318 Merge branch 'abstract_i2c' into abstract_buses 
Conflicts:
	firmware/common/hackrf_core.c
	firmware/common/hackrf_core.h
	firmware/hackrf-common.cmake
 2014-11-13 11:26:41 -08:00
Jared Boone
02cc5814b1 I2C: Interface: Rename init()->start(), add stop(). 2014-11-13 10:32:38 -08:00
Jared Boone
ea136038a9 SPI: Rename spi_t to spi_bus_t to match I2C naming. 2014-11-13 10:16:39 -08:00
Jared Boone
05b8c4c153 SPI: Interface: Rename init()->start(), add stop(). 2014-11-13 09:51:48 -08:00
Jared Boone
eb0dea483f I2C: Finish extracting from Si5351C code. 2014-11-12 14:03:27 -08:00
Jared Boone
569f320826 SPI: Pull remaining hardware bits out of MAX2837/5864/W25Q80BV device drivers. 2014-11-10 17:05:19 -08:00
Jared Boone
8ced9415c2 SPI: Remove MAX2837/5864, W25Q80BV driver dependence on target code. 
Conflicts:
	firmware/common/tuning.c
 2014-11-10 17:05:02 -08:00
Jared Boone
6d57c08e28 MAX2837: Add virtual function for setting device mode. 2014-11-10 17:02:57 -08:00
Jared Boone
905cd2b919 SSP: Merge SSP0 and SSP1 code into single unit. 
Conflicts:
	firmware/common/hackrf_core.c
 2014-11-10 17:02:45 -08:00
Jared Boone
21eb27c3f3 SSP0: Extract SPI interface from W25Q80BV code. 2014-11-10 17:00:15 -08:00
Jared Boone
b8421cc14f SSP1: Merge MAX2837 and MAX5864 SPI code to use single SPI interface. 
Conflicts:
	firmware/common/hackrf_core.c
	firmware/common/hackrf_core.h
 2014-11-10 16:59:47 -08:00
Jared Boone
58e3465ce5 W25Q80BV: Finish abstracting SPI code. 2014-11-10 16:55:22 -08:00
Jared Boone
e6c02bea62 MAX5864: Abstract SPI, extract target code 2014-11-10 16:55:02 -08:00
Jared Boone
579f8212a6 MAX2837: Finish SPI abstraction. 
Conflicts:
	firmware/common/hackrf_core.c
 2014-11-10 16:54:46 -08:00
Jared Boone
58e7ef4171 MAX2837: Refactoring toward abstracted SPI. 
Conflicts:
	firmware/common/hackrf_core.c
	firmware/common/hackrf_core.h
	firmware/common/tuning.c
 2014-11-10 16:53:27 -08:00
Jared Boone
f034bc82ca RFFC5071: Further work abstracting SPI details out of driver. 2014-11-10 16:48:41 -08:00
Jared Boone
7639ef0e3e W25Q80BV: De-singleton the driver. 2014-11-10 16:45:44 -08:00
Jared Boone
d55bd529e2 RFFC507x: De-singleton the driver code. 2014-11-10 16:42:08 -08:00
Jared Boone
453f622b74 MAX2837: De-singleton the driver. 
Conflicts:
	firmware/common/hackrf_core.c
	firmware/common/hackrf_core.h
 2014-11-10 16:37:34 -08:00
Jared Boone
3bc41f1480 Si5351C: Un-singleton the high- and low-level drivers. Proper. 2014-11-10 16:27:35 -08:00
Jared Boone
0bf84d974e Si5351C: Extract low-level driver code. 2014-11-10 16:27:09 -08:00
Jared Boone
245aa1f11e Do not configure BOOT[3:0] pins in SCU, as they should be idle/input/hi-Z on HackRF. 2014-08-11 16:09:50 -07:00
Jared Boone
16709505fc USB0 and USB1 LEDs are only on Jellybean and Jawbreaker. 2014-08-11 16:09:37 -07:00
Jared Boone
9b435f3b7e Configure APB3 for appropriate clock sources during start-up. 2014-08-11 16:07:40 -07:00
Michael Ossmann
15bda174c7 maintain PLLA on XTAL and PLLB on CLKIN at all times (makes automatic clock source switching more reliable) 2014-03-14 22:27:30 -06:00
Michael Ossmann
ca04d7c04b activated CLKOUT (always on) and CLKIN (automatically used when detected) 2014-03-14 21:28:13 -06:00
Jared Boone
7f35ceaff2 Set Si5351C CLK7 output to drive LPC GP_CLKIN at 40MHz, so that activity (e.g. audio) on the LPC can be synchronized with the baseband sample rate. 2013-12-31 20:09:44 -08:00
Jared Boone
0ddb4cb7f2 Configure LPC43xx for GP_CLKIN input. 2013-12-31 20:07:11 -08:00
Jared Boone
1bec883f80 Add baseband sampling frequencies useful for 48kHz audio output. 2013-12-31 20:05:26 -08:00
Jared Boone
5468a01a9b Forgot to include rf_path.h now that its pin setup is called from hackrf_core. 2013-11-21 10:23:53 -08:00
Jared Boone
b285b91e4c Merge remote-tracking branch 'mossmann/master' into jboone_refactor_20130906 
Conflicts:
	firmware/common/hackrf_core.h
	firmware/common/rffc5071.c
 2013-11-20 18:43:40 -08:00
Jared Boone
e3f9e204c1 Relocate SGPIO pin configuration -- it only needs to be done once. 2013-11-20 13:22:19 -08:00
Michael Ossmann
5b14636c2c initial firmware support for HackRF One 2013-11-19 10:01:26 -07:00
Jared Boone
9856ea3d14 Changes due to CGU header API changes. 2013-11-15 11:41:20 -08:00
Jared Boone
76704be008 Remove unused local variable causing a compiler warning. 2013-09-17 22:21:11 -07:00
Jared Boone
d76d72665e Adjusted cpu_clock_pll1_low_speed() to operate at 48MHz, as per several comments with the code. The actual MSEL value was previously selecting 84MHz. 2013-09-04 16:23:32 -07:00
Jared Boone
237bf6ecdb Pulled redundant PLL1 initialization code from cpu_clock_init(). Called cpu_clock_pll1_low_speed() instead. 2013-09-04 16:22:41 -07:00
TitanMKD
24ed48d93a Fix for "issues/62 fix PLL1 overclock bug" see hackrf_core.c -> cpu_clock_init() 
Fix for "issues/78 startup current too high" see hackrf_core.c -> New functions cpu_clock_pll1_low_speed()/cpu_clock_pll1_max_speed() & hackrf_usb.c to switch low_speed/max_speed.
 2013-08-28 22:01:57 +02:00
Sylvain Munaut
f0c7fe66f1 firmware: New fractional sample rate algorithm and usb command 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2013-06-09 00:08:18 +02:00
Hoernchen
1e326997ed firmware: enable int mode if div is even integer 
to improve jitter performance
 2013-06-07 23:10:35 +02:00
Hoernchen
1925649a01 firmware: fractional sample rates 2013-06-07 14:29:14 +02:00
Hoernchen
b6a0b09b1d firmware: remove 5mhz option 2013-05-29 17:47:02 +02:00
Hoernchen
7f6a730c6e si clock for the lpc 2013-05-29 17:12:06 +02:00
Michael Ossmann
60d21a3310 commenting out CGU_PLL1_CTRL_DIRECT=1 because it breaks boot from spifi 2013-05-11 18:55:00 -06:00
Jared Boone
1723cd12a1 Oops, read PLL1 documentation again. Looks like FBSEL=1 is for "normal operation". So include that, but use DIRECT=1 to skip the PSEL divider (which would prevent us producing 204MHz from an in-spec PLL frequency). 2013-05-11 12:25:54 -07:00
Jared Boone
e065cdfe20 Slowed down edges on LED and power enable signals -- they don't need to be fast, and this *might* have a negligible but positive effect on noise. 2013-05-11 12:13:00 -07:00
Jared Boone
d9884af8b8 PLL1 was misconfigured to run at 408MHz (way out of spec) instead of 204MHz. Corrected this by using DIRECT=1 instead of FBSEL=1. 2013-05-11 12:11:37 -07:00
Jared Boone
a4a2a3d6ba Added SCU pinmux data for USB LEDs, configured USB LEDs to be outputs (not float). 2013-05-11 08:09:07 -07:00
TitanMKD
d509489fff ssp1_set_mode_max2837()/void ssp1_set_mode_max5864(void) SPI speed updated to 4.857MHz instead of 0.0498MHz 
To do test it to check there is no problem.
 2013-03-20 22:20:47 +01:00
Michael Ossmann
1a2f871520 moved set_freq out of hackrf_core to facilitate switchctrl fixes 2013-03-07 17:35:48 -07:00