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Author SHA1 Message Date
Michael Ossmann
ed8cbeabd9 adjusted clearances 2012-08-21 09:20:22 -06:00
Michael Ossmann
9b0f0db3a2 extended RF switch IC pads for easier soldering 2012-08-20 17:04:58 -06:00
Michael Ossmann
1b6bc38336 updated date stamp, stitched ground planes 2012-08-20 16:34:07 -06:00
Jared Boone
39b3d94759 Merge branch 'master' of https://github.com/mossmann/hackrf 2012-08-20 15:17:34 -07:00
Michael Ossmann
92b0b36277 fixed zones 2012-08-20 16:12:18 -06:00
Michael Ossmann
61a19d3281 added series resistor to amp supply 2012-08-20 16:02:15 -06:00
Jared Boone
f04f7c838c Merge branch 'master' of https://github.com/mossmann/hackrf 2012-08-20 09:26:49 -07:00
Michael Ossmann
59b3a8c155 silskcreen zone for writing 2012-08-19 18:21:44 -06:00
Michael Ossmann
ce9a4f481e finished layout 2012-08-18 16:43:45 -06:00
Michael Ossmann
db3b599599 RFFC5072 tracks 2012-08-18 14:42:52 -06:00
Michael Ossmann
a8f558c5a1 finished module placement 2012-08-18 12:50:06 -06:00
Michael Ossmann
f100462a22 50 ohm tracks 2012-08-17 15:03:05 -06:00
Michael Ossmann
c2ed31208c started module placement 2012-08-17 14:07:36 -06:00
Michael Ossmann
5ea78e4a74 module selection 2012-08-17 13:08:58 -06:00
Michael Ossmann
91b242ed8e switch control signals 2012-08-17 11:12:42 -06:00
Michael Ossmann
5840402b92 one amp, not two 2012-08-17 10:07:45 -06:00
Michael Ossmann
2338dc2e79 added amplification 2012-08-17 09:32:19 -06:00
Michael Ossmann
d59791f865 reworked licorice for half-duplex only. switch control signals not done yet 2012-08-15 11:55:38 -06:00
Michael Ossmann
7ff16f7425 licorice: another wideband front end board (RFFC5071 with Anaren baluns). Initial schematic done, layout not started. 2012-08-05 23:05:19 -06:00
Michael Ossmann
f3b5ac7db7 completed bom info 2012-08-01 10:39:13 -06:00
Michael Ossmann
a7400ca250 Merge branch 'master' of github.com:mossmann/hackrf 2012-08-01 10:37:05 -06:00
Jared Boone
9f4f1d0b6b Bitband library, factored out of other code. 2012-07-31 22:07:08 -07:00
Jared Boone
2a6e3a89d3 USB performance test firmware project. It does absolutely nothing to start with, but at least the Makefile I just checked in won't blow up! :-) 2012-07-31 22:05:28 -07:00
Jared Boone
33617e6701 Makefile for all firmware projects. 
TODO: There's still something broken about the *_rom_to_ram projects, but I'm not sure what it is yet...
 2012-07-31 22:03:58 -07:00
Jared Boone
f0e4cffb87 Removed release_cpld_jtag_pins() and incorporated code into pin_setup(). 2012-07-31 22:03:01 -07:00
Jared Boone
79d352f17f Fixed Makefile breakage in blinky and blinky_rom_to_ram. 2012-07-31 21:39:43 -07:00
Jared Boone
72ee83eda9 Moving gpio_setup() / pin_setup() functions in separate projects to hackrf_core.h/c. 
Moved enable_1v8_power() and release_cpld_jtag_pins() to hackrf_core.h/c.
 2012-07-31 21:38:57 -07:00
Michael Ossmann
2351caca40 Merge pull request #16 from jboone/master 
Clean up RX CPLD and SGPIO configuration to fix data corruption problems.
 2012-07-24 17:16:50 -07:00
Jared Boone
9a8e5dcdf0 Flip sense of capture clock on SGPIO, which seems to solve the RX data corruption issues. TODO: I wish I had more than empirical evidence that this fix is correct... 2012-07-24 13:31:57 -07:00
Jared Boone
c8c0028d27 Moved CGU peripheral and APB1 base clock configurations to before SSP1 configuration. 2012-07-24 13:29:54 -07:00
Jared Boone
3593bee128 Corrected typo regarding SGPIO external clock configuration. 2012-07-24 13:29:03 -07:00
Jared Boone
4878be8213 New .svf to reflect slew rate and IO standard changes in prior commits. 
Changed name of .svf file to "default.svf" to match what ISE iMPACT wants to write out from "One Step SVF" (a.k.a. "Expresssvf").
 2012-07-24 13:27:19 -07:00
Jared Boone
5ab31b84e0 Remove FAST attribute from all CPLD I/O, since it changes slew rate by less than 1ns -- not enough to be important at 20MHz or so. Will re-examine later, if we try to push bus speed higher on the final board rev. 2012-07-24 12:48:08 -07:00
Jared Boone
18587e3732 Change all IO on CPLD to LVCMOS33 until we make the move to 1V8 supplies on the MAX5864 and Si5351C. 2012-07-24 12:45:46 -07:00
Michael Ossmann
4676ca89f1 ground plane stitching 2012-07-24 00:39:05 -06:00
Michael Ossmann
fea87d8de5 sgpio-rx test firmware 2012-07-23 15:35:44 -06:00
Jared Boone
892f4c1eea Added link to Dangerous Prototypes information on how to switch buffers in Bus Blaster v2. 2012-07-19 16:50:58 -07:00
Jared Boone
6121294550 Moved BSDL requirement to "program" requirements. 2012-07-19 16:48:09 -07:00
Michael Ossmann
37ec0b09f8 Merge pull request #15 from jboone/master 
MAX5864 driver
 2012-07-19 15:06:23 -07:00
Jared Boone
9f334fc5f0 Simple support for MAX5864 configuration via SPI. 2012-07-19 14:57:06 -07:00
Jared Boone
2e7f41a881 Merge branch 'master' of https://github.com/mossmann/hackrf 2012-07-19 14:55:41 -07:00
Michael Ossmann
d3e7346f33 updated layout to match schematic 2012-07-17 16:32:43 -06:00
Michael Ossmann
912ab4c26d brought schematic changes into layout 2012-07-17 11:47:42 -06:00
Michael Ossmann
e9125282d8 new modules 2012-07-17 11:41:58 -06:00
Michael Ossmann
7ce9cdfa73 duplicated smallest LO supply caps 2012-07-17 11:09:04 -06:00
Michael Ossmann
face5eb4f7 finished switchable LO LPFs in schematic 2012-07-17 10:28:01 -06:00
Michael Ossmann
3efc934107 switchable TX LO LPF 2012-07-16 14:52:50 -06:00
Michael Ossmann
8869db7f05 fixed stray noconn 2012-07-16 13:34:03 -06:00
Michael Ossmann
4492174f92 Merge pull request #14 from TitanMKD/master 
SGPIO Test with CPLD passthrough mode
 2012-07-16 11:29:06 -07:00
TitanMKD
fab51038c0 SGPIO Test with CPLD passthrough mode => work in progress because I have some hardware issues on my board. 
For details on Hardware issues see Test_SGPIO0_to15.pdf or Test_SGPIO0_to15.ods
 2012-07-15 18:17:27 +02:00