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h1r9: fix clkout PLL source bug

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This commit is contained in:
Michael Ossmann
2022-12-12 07:39:18 -05:00
committed by Mike Walters
parent bdb6000bb4
commit ff4e1107f3
3 changed files with 5 additions and 2 deletions
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3
firmware/common/max2839.c
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@ -1,5 +1,6 @@
/*
* Copyright 2012 Will Code? (TODO: Proper attribution)
* Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
* Copyright 2012 Will Code <willcode4@gmail.com>
* Copyright 2014 Jared Boone <jared@sharebrained.com>
*
* This file is part of HackRF.

3
firmware/common/max2839.h
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@ -1,5 +1,6 @@
/*
* Copyright 2012 Will Code? (TODO: Proper attribution)
* Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
* Copyright 2012 Will Code <willcode4@gmail.com>
* Copyright 2014 Jared Boone <jared@sharebrained.com>
*
* This file is part of HackRF.

1
firmware/common/si5351c.c
View File

@ -208,6 +208,7 @@ void si5351c_configure_clock_control(
* HackRF One r9 always uses PLL A on the XTAL input
* but externally switches that input to CLKIN.
*/
pll = SI5351C_CLK_PLL_SRC_A;
gpio_set(&gpio_h1r9_clkin_en);
}
} else {