From ff4e1107f358a67b586280295bbe85bba41b090e Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Mon, 12 Dec 2022 07:39:18 -0500 Subject: [PATCH] h1r9: fix clkout PLL source bug --- firmware/common/max2839.c | 3 ++- firmware/common/max2839.h | 3 ++- firmware/common/si5351c.c | 1 + 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/firmware/common/max2839.c b/firmware/common/max2839.c index a8c69f8c..868855d4 100644 --- a/firmware/common/max2839.c +++ b/firmware/common/max2839.c @@ -1,5 +1,6 @@ /* - * Copyright 2012 Will Code? (TODO: Proper attribution) + * Copyright 2012-2022 Great Scott Gadgets + * Copyright 2012 Will Code * Copyright 2014 Jared Boone * * This file is part of HackRF. diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h index 9be7d090..fbffa5b1 100644 --- a/firmware/common/max2839.h +++ b/firmware/common/max2839.h @@ -1,5 +1,6 @@ /* - * Copyright 2012 Will Code? (TODO: Proper attribution) + * Copyright 2012-2022 Great Scott Gadgets + * Copyright 2012 Will Code * Copyright 2014 Jared Boone * * This file is part of HackRF. diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c index 84cfeea7..af858875 100644 --- a/firmware/common/si5351c.c +++ b/firmware/common/si5351c.c @@ -208,6 +208,7 @@ void si5351c_configure_clock_control( * HackRF One r9 always uses PLL A on the XTAL input * but externally switches that input to CLKIN. */ + pll = SI5351C_CLK_PLL_SRC_A; gpio_set(&gpio_h1r9_clkin_en); } } else {