PLL1 was misconfigured to run at 408MHz (way out of spec) instead of 204MHz. Corrected this by using DIRECT=1 instead of FBSEL=1.
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@ -252,7 +252,7 @@ void cpu_clock_init(void)
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| CGU_PLL1_CTRL_PSEL(0)
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| CGU_PLL1_CTRL_PSEL(0)
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| CGU_PLL1_CTRL_NSEL(0)
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| CGU_PLL1_CTRL_NSEL(0)
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| CGU_PLL1_CTRL_MSEL(16)
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| CGU_PLL1_CTRL_MSEL(16)
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| CGU_PLL1_CTRL_FBSEL;
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| CGU_PLL1_CTRL_DIRECT;
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/* wait until stable */
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/* wait until stable */
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while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK));
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while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK));
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