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set PLLs to integer-only mode

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This commit is contained in:
Michael Ossmann
2012-05-01 09:08:26 -06:00
parent 22fc4dfeab
commit cb15d4a83a
1 changed files with 2 additions and 2 deletions
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4
hardware/test/si5351-configure.py
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@ -113,7 +113,7 @@ write_registers(3, 0xFF)
write_registers(9, 0xFF) write_registers(9, 0xFF)
# Power down all CLKx # Power down all CLKx
write_registers(16, (0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80)) write_registers(16, (0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0xC0, 0xC0))
# Register 183: Crystal Internal Load Capacitance # Register 183: Crystal Internal Load Capacitance
# Reads as 0xE4 on power-up # Reads as 0xE4 on power-up
@ -175,7 +175,7 @@ write_registers(92, 0x00)
# CLK4_INV=0 (not inverted) # CLK4_INV=0 (not inverted)
# CLK4_SRC=3 (MS4 as input source) # CLK4_SRC=3 (MS4 as input source)
# CLK4_IDRV=3 (8mA) # CLK4_IDRV=3 (8mA)
write_registers(16, (0x4F, 0x4F, 0x80, 0x80, 0x0F, 0x80, 0x80, 0x80)) write_registers(16, (0x4F, 0x4F, 0x80, 0x80, 0x0F, 0x80, 0xC0, 0xC0))
# Enable CLK outputs 0, 1, 4 only. # Enable CLK outputs 0, 1, 4 only.
write_registers(3, 0xFF ^ 0b00010011) write_registers(3, 0xFF ^ 0b00010011)