Merge pull request #692 from miek/m0_sgpio
Use the M0 core to handle SGPIO samples
This commit is contained in:
@ -34,3 +34,6 @@ MEMORY
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}
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usb_bulk_buffer = ORIGIN(ram_usb);
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usb_bulk_buffer_offset = ORIGIN(ram_shared);
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usb_bulk_buffer_tx = ORIGIN(ram_shared)+4;
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PROVIDE(__ram_m0_start__ = ORIGIN(ram_m0));
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@ -26,8 +26,6 @@
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#include <libopencm3/lpc43xx/sgpio.h>
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void baseband_streaming_enable(sgpio_config_t* const sgpio_config) {
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nvic_set_priority(NVIC_SGPIO_IRQ, 0);
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nvic_enable_irq(NVIC_SGPIO_IRQ);
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SGPIO_SET_EN_1 = (1 << SGPIO_SLICE_A);
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sgpio_cpld_stream_enable(sgpio_config);
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@ -35,6 +33,4 @@ void baseband_streaming_enable(sgpio_config_t* const sgpio_config) {
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void baseband_streaming_disable(sgpio_config_t* const sgpio_config) {
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sgpio_cpld_stream_disable(sgpio_config);
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nvic_disable_irq(NVIC_SGPIO_IRQ);
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}
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@ -35,7 +35,6 @@ set(SRC_M4
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hackrf_usb.c
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"${PATH_HACKRF_FIRMWARE_COMMON}/tuning.c"
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"${PATH_HACKRF_FIRMWARE_COMMON}/streaming.c"
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sgpio_isr.c
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usb_bulk_buffer.c
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"${PATH_HACKRF_FIRMWARE_COMMON}/usb.c"
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"${PATH_HACKRF_FIRMWARE_COMMON}/usb_request.c"
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@ -63,6 +62,8 @@ set(SRC_M4
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"${PATH_HACKRF_FIRMWARE_COMMON}/operacake.c"
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)
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set(SRC_M0 sgpio_m0.s)
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if(BOARD STREQUAL "HACKRF_ONE")
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SET(SRC_M4
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${SRC_M4}
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@ -22,7 +22,9 @@
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#include <stddef.h>
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#include <libopencm3/lpc43xx/ipc.h>
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#include <libopencm3/lpc43xx/m4/nvic.h>
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#include <libopencm3/lpc43xx/rgu.h>
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#include <streaming.h>
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@ -50,6 +52,10 @@
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#include "hackrf-ui.h"
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extern uint32_t __m0_start__;
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extern uint32_t __m0_end__;
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extern uint32_t __ram_m0_start__;
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static usb_request_handler_fn vendor_request_handler[] = {
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NULL,
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usb_vendor_request_set_transceiver_mode,
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@ -176,6 +182,16 @@ static bool cpld_jtag_sram_load(jtag_t* const jtag) {
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return success;
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}
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static void m0_rom_to_ram() {
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uint32_t *dest = &__ram_m0_start__;
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uint32_t *src = &__m0_start__;
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while (src < &__m0_end__) {
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*dest = *src;
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dest++;
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src++;
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}
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}
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int main(void) {
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bool operacake_allow_gpio;
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pin_setup();
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@ -188,6 +204,10 @@ int main(void) {
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#endif
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cpu_clock_init();
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/* Wake the M0 */
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m0_rom_to_ram();
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ipc_start_m0((uint32_t)&__ram_m0_start__);
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if( !cpld_jtag_sram_load(&jtag_cpld) ) {
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halt_and_flash(6000000);
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}
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@ -229,6 +249,7 @@ int main(void) {
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operacake_init(operacake_allow_gpio);
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unsigned int phase = 0;
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usb_bulk_buffer_offset = 0;
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while(true) {
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// Check whether we need to initiate a CPLD update
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@ -1,85 +0,0 @@
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/*
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* Copyright 2012 Jared Boone
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* Copyright 2013 Benjamin Vernoux
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "sgpio_isr.h"
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#include <libopencm3/lpc43xx/sgpio.h>
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#include "usb_bulk_buffer.h"
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void sgpio_isr_rx() {
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SGPIO_CLR_STATUS_1 = (1 << SGPIO_SLICE_A);
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uint32_t* const p = (uint32_t*)&usb_bulk_buffer[usb_bulk_buffer_offset];
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__asm__(
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"ldr r0, [%[SGPIO_REG_SS], #44]\n\t"
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"str r0, [%[p], #0]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #20]\n\t"
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"str r0, [%[p], #4]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #40]\n\t"
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"str r0, [%[p], #8]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #8]\n\t"
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"str r0, [%[p], #12]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #36]\n\t"
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"str r0, [%[p], #16]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #16]\n\t"
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"str r0, [%[p], #20]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #32]\n\t"
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"str r0, [%[p], #24]\n\t"
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"ldr r0, [%[SGPIO_REG_SS], #0]\n\t"
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"str r0, [%[p], #28]\n\t"
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:
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: [SGPIO_REG_SS] "l" (SGPIO_PORT_BASE + 0x100),
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[p] "l" (p)
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: "r0"
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);
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usb_bulk_buffer_offset = (usb_bulk_buffer_offset + 32) & usb_bulk_buffer_mask;
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}
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void sgpio_isr_tx() {
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SGPIO_CLR_STATUS_1 = (1 << SGPIO_SLICE_A);
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uint32_t* const p = (uint32_t*)&usb_bulk_buffer[usb_bulk_buffer_offset];
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__asm__(
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"ldr r0, [%[p], #0]\n\t"
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"str r0, [%[SGPIO_REG_SS], #44]\n\t"
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"ldr r0, [%[p], #4]\n\t"
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"str r0, [%[SGPIO_REG_SS], #20]\n\t"
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"ldr r0, [%[p], #8]\n\t"
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"str r0, [%[SGPIO_REG_SS], #40]\n\t"
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"ldr r0, [%[p], #12]\n\t"
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"str r0, [%[SGPIO_REG_SS], #8]\n\t"
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"ldr r0, [%[p], #16]\n\t"
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"str r0, [%[SGPIO_REG_SS], #36]\n\t"
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"ldr r0, [%[p], #20]\n\t"
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"str r0, [%[SGPIO_REG_SS], #16]\n\t"
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"ldr r0, [%[p], #24]\n\t"
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"str r0, [%[SGPIO_REG_SS], #32]\n\t"
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"ldr r0, [%[p], #28]\n\t"
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"str r0, [%[SGPIO_REG_SS], #0]\n\t"
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:
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: [SGPIO_REG_SS] "l" (SGPIO_PORT_BASE + 0x100),
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[p] "l" (p)
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: "r0"
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);
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usb_bulk_buffer_offset = (usb_bulk_buffer_offset + 32) & usb_bulk_buffer_mask;
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}
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@ -1,29 +0,0 @@
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/*
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* Copyright 2012 Jared Boone
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* Copyright 2013 Benjamin Vernoux
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __SGPIO_ISR_H__
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#define __SGPIO_ISR_H__
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void sgpio_isr_rx();
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void sgpio_isr_tx();
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#endif/*__SGPIO_ISR_H__*/
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108
firmware/hackrf_usb/sgpio_m0.s
Normal file
108
firmware/hackrf_usb/sgpio_m0.s
Normal file
@ -0,0 +1,108 @@
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/*
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* This file is part of GreatFET
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*
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* Specialized SGPIO interrupt handler for Rhododendron.
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*/
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// Constants that point to registers we'll need to modify in the SGPIO block.
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.equ SGPIO_REGISTER_BLOCK_BASE, 0x40101000
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.equ SGPIO_SHADOW_REGISTERS_BASE, 0x40101100
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.equ SGPIO_EXCHANGE_INTERRUPT_CLEAR_REG, 0x40101F30
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.equ SGPIO_EXCHANGE_INTERRUPT_STATUS_REG, 0x40101F2C
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.equ SGPIO_GPIO_INPUT, 0x40101210
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// Buffer that we're funneling data to/from.
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.equ TARGET_DATA_BUFFER, 0x20008000
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.equ TARGET_BUFFER_POSITION, 0x20007000
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.equ TARGET_BUFFER_TX, 0x20007004
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.equ TARGET_BUFFER_MASK, 0x7fff
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.global main
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.thumb_func
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main:
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// Spin until we're ready to handle an SGPIO packet:
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// Grab the exchange interrupt staus...
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ldr r0, =SGPIO_EXCHANGE_INTERRUPT_STATUS_REG
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ldr r0, [r0]
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// ... check to see if it has any interrupt bits set...
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lsr r0, #1
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// ... and if not, jump back to the beginning.
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bcc main
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// Clear the interrupt pending bits for the SGPIO slices we're working with.
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ldr r0, =SGPIO_EXCHANGE_INTERRUPT_CLEAR_REG
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ldr r1, =0xffff
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str r1, [r0]
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// Grab the base address of the SGPIO shadow registers...
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ldr r7, =SGPIO_SHADOW_REGISTERS_BASE
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// ... and grab the address of the buffer segment we want to write to / read from.
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ldr r0, =TARGET_DATA_BUFFER // r0 = &buffer
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ldr r3, =TARGET_BUFFER_POSITION // r3 = &position_in_buffer
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ldr r2, [r3] // r2 = position_in_buffer
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add r6, r0, r2 // r6 = buffer_target = &buffer + position_in_buffer
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mov r8, r3 // Store &position_in_buffer.
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// Our slice chain is set up as follows (ascending data age; arrows are reversed for flow):
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// L -> F -> K -> C -> J -> E -> I -> A
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// Which has equivalent shadow register offsets:
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// 44 -> 20 -> 40 -> 8 -> 36 -> 16 -> 32 -> 0
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// Load direction (TX or RX)
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ldr r0, =TARGET_BUFFER_TX
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ldr r0, [r0]
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// TX?
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lsr r0, #1
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bcc direction_rx
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direction_tx:
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ldm r6!, {r0-r5}
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str r0, [r7, #44]
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str r1, [r7, #20]
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str r2, [r7, #40]
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str r3, [r7, #8 ]
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str r4, [r7, #36]
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str r5, [r7, #16]
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ldm r6!, {r0-r1}
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str r0, [r7, #32]
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str r1, [r7, #0]
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b done
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direction_rx:
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// 8 cycles
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ldr r0, [r7, #44] // 2
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ldr r1, [r7, #20] // 2
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ldr r2, [r7, #40] // 2
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ldr r3, [r7, #8 ] // 2
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ldr r4, [r7, #36] // 2
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ldr r5, [r7, #16] // 2
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stm r6!, {r0-r5} // 7
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// 6 cycles
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ldr r0, [r7, #32] // 2
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ldr r1, [r7, #0] // 2
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stm r6!, {r0-r1}
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done:
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// Finally, update the buffer location...
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ldr r0, =TARGET_BUFFER_MASK
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and r0, r6, r0 // r0 = (position_in_buffer + size_copied) % buffer_size
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// ... restore &position_in_buffer, and store the new position there...
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mov r1, r8
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str r0, [r1] // position_in_buffer = (position_in_buffer + size_copied) % buffer_size
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b main
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@ -24,8 +24,7 @@
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#include "hackrf-ui.h"
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#include <libopencm3/cm3/vector.h>
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#include <libopencm3/lpc43xx/m4/nvic.h>
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#include "sgpio_isr.h"
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#include "usb_bulk_buffer.h"
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#include "usb_api_cpld.h" // Remove when CPLD update is handled elsewhere
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@ -257,18 +256,18 @@ void set_transceiver_mode(const transceiver_mode_t new_transceiver_mode) {
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led_on(LED2);
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usb_endpoint_init(&usb_endpoint_bulk_in);
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rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_RX);
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vector_table.irq[NVIC_SGPIO_IRQ] = sgpio_isr_rx;
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usb_bulk_buffer_tx = false;
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} else if (_transceiver_mode == TRANSCEIVER_MODE_TX) {
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led_off(LED2);
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led_on(LED3);
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usb_endpoint_init(&usb_endpoint_bulk_out);
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rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_TX);
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vector_table.irq[NVIC_SGPIO_IRQ] = sgpio_isr_tx;
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usb_bulk_buffer_tx = true;
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} else {
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led_off(LED2);
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led_off(LED3);
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rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_OFF);
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vector_table.irq[NVIC_SGPIO_IRQ] = sgpio_isr_rx;
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usb_bulk_buffer_tx = false;
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}
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@ -22,5 +22,4 @@
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#include "usb_bulk_buffer.h"
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const uint32_t usb_bulk_buffer_mask = 32768 - 1;
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volatile uint32_t usb_bulk_buffer_offset = 0;
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@ -23,6 +23,7 @@
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#ifndef __USB_BULK_BUFFER_H__
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#define __USB_BULK_BUFFER_H__
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#include <stdbool.h>
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#include <stdint.h>
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/* Address of usb_bulk_buffer is set in ldscripts. If you change the name of this
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@ -31,8 +32,8 @@
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*/
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extern uint8_t usb_bulk_buffer[32768];
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extern const uint32_t usb_bulk_buffer_mask;
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extern volatile uint32_t usb_bulk_buffer_offset;
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extern bool usb_bulk_buffer_tx;
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#endif/*__USB_BULK_BUFFER_H__*/
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