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SSP1: Merge MAX2837 and MAX5864 SPI code to use single SPI interface.

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Conflicts:
	firmware/common/hackrf_core.c
	firmware/common/hackrf_core.h
This commit is contained in:
Jared Boone
2014-11-09 22:10:27 -08:00
parent 58e3465ce5
commit b8421cc14f
21 changed files with 139 additions and 177 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
firmware/common/hackrf_core.c
View File

@ -23,11 +23,10 @@
#include "hackrf_core.h"
#include "si5351c.h"
#include "spi_ssp1.h"
#include "max2837.h"
#include "max2837_spi.h"
#include "max2837_target.h"
#include "max5864.h"
#include "max5864_spi.h"
#include "max5864_target.h"
#include "rffc5071.h"
#include "rffc5071_spi.h"
@ -41,27 +40,53 @@
#define WAIT_CPU_CLOCK_INIT_DELAY (10000)
spi_t max2837_spi = {
.init = max2837_spi_init,
.transfer = max2837_spi_transfer,
.transfer_gather = max2837_spi_transfer_gather,
const ssp1_config_t ssp1_config_max2837 = {
/* FIXME speed up once everything is working reliably */
/*
// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
const uint8_t serial_clock_rate = 32;
const uint8_t clock_prescale_rate = 128;
*/
// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
.data_bits = SSP_DATA_16BITS,
.serial_clock_rate = 21,
.clock_prescale_rate = 2,
.select = max2837_target_spi_select,
.unselect = max2837_target_spi_unselect,
};
const ssp1_config_t ssp1_config_max5864 = {
/* FIXME speed up once everything is working reliably */
/*
// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
const uint8_t serial_clock_rate = 32;
const uint8_t clock_prescale_rate = 128;
*/
// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
.data_bits = SSP_DATA_8BITS,
.serial_clock_rate = 21,
.clock_prescale_rate = 2,
.select = max5864_target_spi_select,
.unselect = max5864_target_spi_unselect,
};
spi_t spi_ssp1 = {
.config = &ssp1_config_max2837,
.init = spi_ssp1_init,
.transfer = spi_ssp1_transfer,
.transfer_gather = spi_ssp1_transfer_gather,
};
max2837_driver_t max2837 = {
.spi = &max2837_spi,
};
spi_t max5864_spi = {
.init = max5864_spi_init,
.transfer = max5864_spi_transfer,
.transfer_gather = max5864_spi_transfer_gather,
.spi = &spi_ssp1,
};
max5864_driver_t max5864 = {
.spi = &max5864_spi,
.spi = &spi_ssp1,
};
spi_t rffc5071_spi = {
.config = NULL,
.init = rffc5071_spi_init,
.transfer = rffc5071_spi_transfer,
.transfer_gather = rffc5071_spi_transfer_gather,
@ -542,12 +567,12 @@ void cpu_clock_pll1_max_speed(void)
void ssp1_set_mode_max2837(void)
{
spi_init(max2837.spi);
spi_init(max2837.spi, &ssp1_config_max2837);
}
void ssp1_set_mode_max5864(void)
{
spi_init(max5864.spi);
spi_init(max5864.spi, &ssp1_config_max5864);
}
void pin_setup(void) {

6
firmware/common/hackrf_core.h
View File

@ -32,6 +32,8 @@ extern "C"
#include <stdint.h>
#include <stdbool.h>
#include "spi_ssp1.h"
#include "max2837.h"
#include "max5864.h"
#include "rffc5071.h"
@ -353,6 +355,10 @@ typedef enum {
} transceiver_mode_t;
void delay(uint32_t duration);
extern const ssp1_config_t ssp1_config_max2837;
extern const ssp1_config_t ssp1_config_max5864;
extern max2837_driver_t max2837;
extern max5864_driver_t max5864;
extern rffc5071_driver_t rffc5072;

2
firmware/common/max2837.c
View File

@ -79,7 +79,7 @@ static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = {
/* Set up all registers according to defaults specified in docs. */
static void max2837_init(max2837_driver_t* const drv)
{
spi_init(drv->spi);
spi_init(drv->spi, &ssp1_config_max2837);
max2837_mode_shutdown(drv);
max2837_target_init(drv);

79
firmware/common/max2837_spi.c
View File

@ -1,79 +0,0 @@
/*
* Copyright 2012 Will Code? (TODO: Proper attribution)
* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
*
* This file is part of HackRF.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#include "max2837_spi.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/ssp.h>
#include "hackrf_core.h"
void max2837_spi_init(spi_t* const spi) {
(void)spi;
/* FIXME speed up once everything is working reliably */
/*
// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
const uint8_t serial_clock_rate = 32;
const uint8_t clock_prescale_rate = 128;
*/
// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
const uint8_t serial_clock_rate = 21;
const uint8_t clock_prescale_rate = 2;
ssp_init(SSP1_NUM,
SSP_DATA_16BITS,
SSP_FRAME_SPI,
SSP_CPOL_0_CPHA_0,
serial_clock_rate,
clock_prescale_rate,
SSP_MODE_NORMAL,
SSP_MASTER,
SSP_SLAVE_OUT_ENABLE);
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
}
void max2837_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
(void)spi;
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
for(size_t i=0; i<count; i++) {
const size_t data_count = transfers[i].count;
uint16_t* const data = transfers[i].data;
for(size_t j=0; j<data_count; j++) {
data[j] = ssp_transfer(SSP1_NUM, data[j]);
}
}
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
}
void max2837_spi_transfer(spi_t* const spi, void* const data, const size_t count) {
const spi_transfer_t transfers[] = {
{ data, count },
};
max2837_spi_transfer_gather(spi, transfers, 1);
}

34
firmware/common/max2837_spi.h
View File

@ -1,34 +0,0 @@
/*
* Copyright 2012 Will Code? (TODO: Proper attribution)
* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
*
* This file is part of HackRF.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#ifndef __MAX2837_SPI_H__
#define __MAX2837_SPI_H__
#include "stddef.h"
#include "spi.h"
void max2837_spi_init(spi_t* const spi);
void max2837_spi_transfer(spi_t* const spi, void* const data, const size_t count);
void max2837_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
#endif/*__MAX2837_SPI_H__*/

10
firmware/common/max2837_target.c
View File

@ -77,6 +77,16 @@ void max2837_target_init(max2837_driver_t* const drv) {
#endif
}
void max2837_target_spi_select(spi_t* const spi) {
(void)spi;
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
}
void max2837_target_spi_unselect(spi_t* const spi) {
(void)spi;
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
}
void max2837_mode_shutdown(max2837_driver_t* const drv) {
(void)drv;
/* All circuit blocks are powered down, except the 4-wire serial bus

4
firmware/common/max2837_target.h
View File

@ -24,8 +24,12 @@
#define __MAX2837_TARGET_H
#include "max2837.h"
#include "spi.h"
void max2837_target_init(max2837_driver_t* const drv);
void max2837_target_spi_select(spi_t* const spi);
void max2837_target_spi_unselect(spi_t* const spi);
void max2837_mode_shutdown(max2837_driver_t* const drv);
void max2837_mode_standby(max2837_driver_t* const drv);
void max2837_mode_tx(max2837_driver_t* const drv);

6
firmware/common/max5864.c
View File

@ -24,12 +24,14 @@
#include "max5864.h"
#include "max5864_target.h"
#include "hackrf_core.h"
static void max5864_write(max5864_driver_t* const drv, uint8_t value) {
spi_transfer(drv->spi, &value, 1);
}
void max5864_init(max5864_driver_t* const drv) {
spi_init(drv->spi);
static void max5864_init(max5864_driver_t* const drv) {
spi_init(drv->spi, &ssp1_config_max5864);
max5864_target_init(drv);
}

10
firmware/common/max5864_target.c
View File

@ -36,3 +36,13 @@ void max5864_target_init(max5864_driver_t* const drv) {
GPIO_SET(PORT_AD_CS) = PIN_AD_CS;
GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS;
}
void max5864_target_spi_select(spi_t* const spi) {
(void)spi;
gpio_clear(PORT_AD_CS, PIN_AD_CS);
}
void max5864_target_spi_unselect(spi_t* const spi) {
(void)spi;
gpio_set(PORT_AD_CS, PIN_AD_CS);
}

3
firmware/common/max5864_target.h
View File

@ -23,7 +23,10 @@
#define __MAX5864_TARGET_H__
#include "max5864.h"
#include "spi.h"
void max5864_target_init(max5864_driver_t* const drv);
void max5864_target_spi_select(spi_t* const spi);
void max5864_target_spi_unselect(spi_t* const spi);
#endif/*__MAX5864_TARGET_H__*/

2
firmware/common/rffc5071.c
View File

@ -90,7 +90,7 @@ void rffc5071_setup(rffc5071_driver_t* const drv)
{
rffc5071_init(drv);
spi_init(drv->spi);
spi_init(drv->spi, NULL);
/* initial setup */
/* put zeros in freq contol registers */

3
firmware/common/rffc5071_spi.c
View File

@ -83,7 +83,8 @@ static void rffc5071_spi_target_init(spi_t* const spi) {
gpio_set(PORT_MIXER_RESETX, PIN_MIXER_RESETX); /* active low */
}
void rffc5071_spi_init(spi_t* const spi) {
void rffc5071_spi_init(spi_t* const spi, const void* const config) {
(void)config;
rffc5071_spi_bus_init(spi);
rffc5071_spi_target_init(spi);
}

2
firmware/common/rffc5071_spi.h
View File

@ -25,7 +25,7 @@
#include "spi.h"
void rffc5071_spi_init(spi_t* const spi);
void rffc5071_spi_init(spi_t* const spi, const void* const config);
void rffc5071_spi_transfer(spi_t* const spi, void* const data, const size_t count);
void rffc5071_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfer, const size_t count);

4
firmware/common/spi.c
View File

@ -21,8 +21,8 @@
#include "spi.h"
void spi_init(spi_t* const spi) {
spi->init(spi);
void spi_init(spi_t* const spi, const void* const config) {
spi->init(spi, config);
}
void spi_transfer(spi_t* const spi, void* const data, const size_t count) {

5
firmware/common/spi.h
View File

@ -33,12 +33,13 @@ struct spi_t;
typedef struct spi_t spi_t;
struct spi_t {
void (*init)(spi_t* const spi);
const void* config;
void (*init)(spi_t* const spi, const void* const config);
void (*transfer)(spi_t* const spi, void* const data, const size_t count);
void (*transfer_gather)(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
};
void spi_init(spi_t* const spi);
void spi_init(spi_t* const spi, const void* const config);
void spi_transfer(spi_t* const spi, void* const data, const size_t count);
void spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);

47
firmware/common/max5864_spi.c → firmware/common/spi_ssp1.c
View File

@ -19,60 +19,61 @@
* Boston, MA 02110-1301, USA.
*/
#include "max5864_spi.h"
#include "spi_ssp1.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/ssp.h>
#include "hackrf_core.h"
void max5864_spi_init(spi_t* const spi) {
(void)spi;
/* FIXME speed up once everything is working reliably */
/*
// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
const uint8_t serial_clock_rate = 32;
const uint8_t clock_prescale_rate = 128;
*/
// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
const uint8_t serial_clock_rate = 21;
const uint8_t clock_prescale_rate = 2;
void spi_ssp1_init(spi_t* const spi, const void* const _config) {
const ssp1_config_t* const config = _config;
ssp_init(SSP1_NUM,
SSP_DATA_8BITS,
config->data_bits,
SSP_FRAME_SPI,
SSP_CPOL_0_CPHA_0,
serial_clock_rate,
clock_prescale_rate,
config->serial_clock_rate,
config->clock_prescale_rate,
SSP_MODE_NORMAL,
SSP_MASTER,
SSP_SLAVE_OUT_ENABLE);
spi->config = config;
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
}
void max5864_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
(void)spi;
void spi_ssp1_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
const ssp1_config_t* const config = spi->config;
gpio_clear(PORT_AD_CS, PIN_AD_CS);
const size_t word_size = (SSP1_CR0 & 0xf) + 1;
config->select(spi);
for(size_t i=0; i<count; i++) {
const size_t data_count = transfers[i].count;
if( word_size > 8 ) {
uint16_t* const data = transfers[i].data;
for(size_t j=0; j<data_count; j++) {
data[j] = ssp_transfer(SSP1_NUM, data[j]);
}
} else {
uint8_t* const data = transfers[i].data;
for(size_t j=0; j<data_count; j++) {
data[j] = ssp_transfer(SSP1_NUM, data[j]);
}
}
gpio_set(PORT_AD_CS, PIN_AD_CS);
}
config->unselect(spi);
}
void max5864_spi_transfer(spi_t* const spi, void* const data, const size_t count) {
void spi_ssp1_transfer(spi_t* const spi, void* const data, const size_t count) {
const spi_transfer_t transfers[] = {
{ data, count },
};
max5864_spi_transfer_gather(spi, transfers, 1);
spi_ssp1_transfer_gather(spi, transfers, 1);
}

23
firmware/common/max5864_spi.h → firmware/common/spi_ssp1.h
View File

@ -19,15 +19,26 @@
* Boston, MA 02110-1301, USA.
*/
#ifndef __MAX5864_SPI_H__
#define __MAX5864_SPI_H__
#ifndef __SPI_SSP1_H__
#define __SPI_SSP1_H__
#include <stdint.h>
#include <stddef.h>
#include "spi.h"
void max5864_spi_init(spi_t* const spi);
void max5864_spi_transfer(spi_t* const spi, void* const value, const size_t count);
void max5864_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
#include <libopencm3/lpc43xx/ssp.h>
#endif/*__MAX5864_SPI_H__*/
typedef struct ssp1_config_t {
ssp_datasize_t data_bits;
uint8_t serial_clock_rate;
uint8_t clock_prescale_rate;
void (*select)(spi_t* const spi);
void (*unselect)(spi_t* const spi);
} ssp1_config_t;
void spi_ssp1_init(spi_t* const spi, const void* const config);
void spi_ssp1_transfer(spi_t* const spi, void* const value, const size_t count);
void spi_ssp1_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
#endif/*__SPI_SSP1_H__*/

3
firmware/common/w25q80bv.c
View File

@ -58,7 +58,7 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv)
drv->num_pages = 4096U;
drv->num_bytes = 1048576U;
spi_init(drv->spi);
spi_init(drv->spi, NULL);
device_id = 0;
while(device_id != W25Q80BV_DEVICE_ID_RES)
@ -201,6 +201,7 @@ void w25q80bv_program(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len,
}
spi_t w25q80bv_spi = {
.config = NULL,
.init = w25q80bv_spi_init,
.transfer = w25q80bv_spi_transfer,
.transfer_gather = w25q80bv_spi_transfer_gather,

3
firmware/common/w25q80bv_spi.c
View File

@ -30,8 +30,9 @@
#include "hackrf_core.h"
void w25q80bv_spi_init(spi_t* const spi) {
void w25q80bv_spi_init(spi_t* const spi, const void* const config) {
(void)spi;
(void)config;
const uint8_t serial_clock_rate = 2;
const uint8_t clock_prescale_rate = 2;

2
firmware/common/w25q80bv_spi.h
View File

@ -28,7 +28,7 @@
#include "spi.h"
void w25q80bv_spi_init(spi_t* const spi);
void w25q80bv_spi_init(spi_t* const spi, const void* const config);
void w25q80bv_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t transfer_count);
void w25q80bv_spi_transfer(spi_t* const spi, void* const data, const size_t count);

3
firmware/hackrf-common.cmake
View File

@ -135,14 +135,13 @@ macro(DeclareTargets)
${PATH_HACKRF_FIRMWARE_COMMON}/rf_path.c
${PATH_HACKRF_FIRMWARE_COMMON}/si5351c.c
${PATH_HACKRF_FIRMWARE_COMMON}/max2837.c
${PATH_HACKRF_FIRMWARE_COMMON}/max2837_spi.c
${PATH_HACKRF_FIRMWARE_COMMON}/max2837_target.c
${PATH_HACKRF_FIRMWARE_COMMON}/max5864.c
${PATH_HACKRF_FIRMWARE_COMMON}/max5864_spi.c
${PATH_HACKRF_FIRMWARE_COMMON}/max5864_target.c
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp1.c
m0_bin.s
)