migrated common stuff to libopencm3
This commit is contained in:
Michael Ossmann
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2010 - 2012 Michael Ossmann
|
||||
* Copyright 2012 Michael Ossmann <mike@ossmann.com>
|
||||
*
|
||||
* This file is part of HackRF
|
||||
*
|
||||
@ -18,141 +18,16 @@
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
ENTRY(_start)
|
||||
SEARCH_DIR(.)
|
||||
GROUP(libgcc.a libc.a libm.a libnosys.a)
|
||||
|
||||
/* Linker script for HackRF Jellybean (LPC4330, 1M SPI flash, 264K SRAM). */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* Our code is installed in SPIFI at 0x80000000 (and copied to RAM at
|
||||
* 0x10000000 by the bootloader?), but it is addressed through the 256M
|
||||
* shadow area at 0x00000000.
|
||||
*/
|
||||
shadow (rx) : ORIGIN = 0x00000000, LENGTH = 1M
|
||||
/* rom is really the shadow region that points to SPI flash or elsewhere */
|
||||
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M
|
||||
ram (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
|
||||
/* there are some additional RAM regions */
|
||||
}
|
||||
|
||||
/*
|
||||
* much copied from: Linker script for Cortex-M3
|
||||
*
|
||||
* Version:CodeSourcery Sourcery G++ Lite 2007q3-53
|
||||
* BugURL:https://support.codesourcery.com/GNUToolchain/
|
||||
*
|
||||
* Copyright 2007 CodeSourcery.
|
||||
*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
EXTERN(Reset_Handler)
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(0x400); /* Ensure that vector table is aligned as hardware requires. */
|
||||
_interrupt_vector_table = .;
|
||||
KEEP(*(.irq_handler_table))
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .;
|
||||
|
||||
} > shadow
|
||||
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > shadow
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > shadow
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
_data = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
_edata = .;
|
||||
} > ram AT>shadow
|
||||
|
||||
/* zero initialized data */
|
||||
.bss :
|
||||
{
|
||||
_bss = .;
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
_ebss = .;
|
||||
__bss_end__ = .;
|
||||
} > ram
|
||||
|
||||
/* Where we put the heap with cr_clib */
|
||||
.cr_heap :
|
||||
{
|
||||
end = .;
|
||||
__end__ = .;
|
||||
_pvHeapStart = .;
|
||||
} > ram
|
||||
|
||||
/* Leave room above stack for IAP to run */
|
||||
_StackTop = ORIGIN(ram) + LENGTH(ram) - 32;
|
||||
|
||||
}
|
||||
/* Include the common ld script. */
|
||||
INCLUDE libopencm3_lpc43xx.ld
|
||||
|
||||
@ -1,47 +1,28 @@
|
||||
# Hey Emacs, this is a -*- makefile -*-
|
||||
#----------------------------------------------------------------------------
|
||||
# WinAVR Makefile Template written by Eric B. Weddington, Jörg Wunsch, et al.
|
||||
# >> Modified for use with the LUFA project. <<
|
||||
#
|
||||
# Released to the Public Domain
|
||||
# Copyright 2009 Uwe Hermann <uwe@hermann-uwe.de>
|
||||
# Copyright 2010 Piotr Esden-Tempski <piotr@esden.net>
|
||||
# Copyright 2012 Michael Ossmann <mike@ossmann.com>
|
||||
# Copyright 2012 Benjamin Vernoux <titanmkd@gmail.com>
|
||||
#
|
||||
# Altered for ARM Cortex-M3 by Opendous Inc. - 2010-01-05
|
||||
# Altered for Project Ubertooth by Michael Ossmann 2010
|
||||
# Altered for HackRF by Michael Ossmann 2012
|
||||
# This file is part of HackRF.
|
||||
#
|
||||
# Additional material for this makefile was written by:
|
||||
# Peter Fleury
|
||||
# Tim Henigan
|
||||
# Colin O'Flynn
|
||||
# Reiner Patommel
|
||||
# Markus Pfaff
|
||||
# Sander Pool
|
||||
# Frederik Rouleau
|
||||
# Carlos Lamas
|
||||
# Dean Camera
|
||||
# Denver Gingerich
|
||||
# Opendous Inc.
|
||||
# Michael Ossmann
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2, or (at your option)
|
||||
# any later version.
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
# On command line:
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# make all = Make software.
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; see the file COPYING. If not, write to
|
||||
# the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
# Boston, MA 02110-1301, USA.
|
||||
#
|
||||
# make clean = Clean out built project files.
|
||||
#
|
||||
# make program = Download the hex file to the device
|
||||
#
|
||||
# make doxygen = Generate DoxyGen documentation for the project (must have
|
||||
# DoxyGen installed)
|
||||
#
|
||||
# make filename.s = Just compile filename.c into the assembler code only.
|
||||
#
|
||||
# make filename.i = Create a preprocessed source file for use in submitting
|
||||
# bug reports to the GCC project.
|
||||
#
|
||||
# To rebuild project do "make clean" then "make all".
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
# derived primarily from Makefiles in libopencm3
|
||||
|
||||
BOARD ?= JELLYBEAN
|
||||
|
||||
@ -50,402 +31,84 @@ HACKRF_OPTS = -D$(BOARD)
|
||||
# comment to disable RF transmission
|
||||
HACKRF_OPTS += -DTX_ENABLE
|
||||
|
||||
# CPU architecture
|
||||
CPU = cortex-m4
|
||||
#FIXME move
|
||||
BINARY = blinky
|
||||
|
||||
# Instruction Set to use (also known as CPU Mode)
|
||||
CPU_MODE = mthumb
|
||||
LDSCRIPT = ../common/LPC4330_M4.ld
|
||||
|
||||
# Additional CPU flags
|
||||
CPU_FLAGS = -mapcs-frame
|
||||
CPU_FLAGS += -mfloat-abi=hard
|
||||
CPU_FLAGS += -mfpu=fpv4-sp-d16
|
||||
#CPU_FLAGS_ASM = -mthumb-interwork
|
||||
LIBOPENCM3 ?= /usr/local/arm-none-eabi
|
||||
|
||||
# Output format. (can be srec, ihex, binary)
|
||||
FORMAT = ihex
|
||||
PREFIX ?= arm-none-eabi
|
||||
#PREFIX ?= arm-elf
|
||||
CC = $(PREFIX)-gcc
|
||||
LD = $(PREFIX)-gcc
|
||||
OBJCOPY = $(PREFIX)-objcopy
|
||||
OBJDUMP = $(PREFIX)-objdump
|
||||
GDB = $(PREFIX)-gdb
|
||||
CFLAGS += -O2 -g -Wall -Wextra -I$(LIBOPENCM3)/include -I../common \
|
||||
-fno-common -mcpu=cortex-m4 -mthumb -MD \
|
||||
-mfloat-abi=hard -mfpu=fpv4-sp-d16 \
|
||||
$(HACKRF_OPTS)
|
||||
LDSCRIPT ?= $(BINARY).ld
|
||||
LDFLAGS += -L$(LIBOPENCM3)/lib -T$(LDSCRIPT) -nostartfiles \
|
||||
-Wl,--gc-sections -Xlinker -Map=$(BINARY).map
|
||||
OBJS += $(BINARY).o
|
||||
|
||||
# Output Directory
|
||||
OUTDIR = .
|
||||
# Be silent per default, but 'make V=1' will show all compiler calls.
|
||||
ifneq ($(V),1)
|
||||
Q := @
|
||||
NULL := 2>/dev/null
|
||||
else
|
||||
LDFLAGS += -Wl,--print-gc-sections
|
||||
endif
|
||||
|
||||
# Library paths
|
||||
LIBS_PATH = ../common
|
||||
.SUFFIXES: .elf .bin .hex .srec .list .images
|
||||
.SECONDEXPANSION:
|
||||
.SECONDARY:
|
||||
|
||||
# List Assembler source files here.
|
||||
# Make them always end in a capital .S. Files ending in a lowercase .s
|
||||
# will not be considered source files but generated files (assembler
|
||||
# output from the compiler), and will be deleted upon "make clean"!
|
||||
# Even though the DOS/Win* filesystem matches both .s and .S the same,
|
||||
# it will preserve the spelling of the filenames, and gcc itself does
|
||||
# care about how the name is spelled on its command-line.
|
||||
ASRC =
|
||||
all: images
|
||||
|
||||
# Object files directory
|
||||
# To put object files in current directory, use a dot (.), do NOT make
|
||||
# this an empty or blank macro!
|
||||
OBJDIR = .
|
||||
images: $(BINARY).images
|
||||
flash: $(BINARY).flash
|
||||
|
||||
# Optimization level, can be [0, 1, 2, 3, s].
|
||||
# 0 = turn off optimization. s = optimize for size.
|
||||
# (Note: 3 is not always the best optimization level. See libc FAQ.)
|
||||
OPT = 2
|
||||
|
||||
# Debugging format.
|
||||
DEBUG = dwarf-2 -g3
|
||||
|
||||
# Linker Script for the current MCU
|
||||
LINKER_SCRIPT ?= LPC4330_M4.ld
|
||||
|
||||
# List any extra directories to look for include files here.
|
||||
# Each directory must be seperated by a space.
|
||||
# Use forward slashes for directory separators.
|
||||
# For a directory that has spaces, enclose it in quotes.
|
||||
EXTRAINCDIRS = $(LIBS_PATH)
|
||||
|
||||
# Compiler flag to set the C Standard level.
|
||||
# c89 = "ANSI" C
|
||||
# gnu89 = c89 plus GCC extensions
|
||||
# c99 = ISO C99 standard (not yet fully implemented)
|
||||
# gnu99 = c99 plus GCC extensions
|
||||
CSTANDARD = -std=gnu99
|
||||
|
||||
# Place -D or -U options here for C sources
|
||||
CDEFS = $(HACKRF_OPTS) $(COMPILE_OPTS) -Wa,-a,-ad
|
||||
|
||||
# Place -D or -U options here for ASM sources
|
||||
ADEFS =
|
||||
|
||||
# Place -D or -U options here for C++ sources
|
||||
CPPDEFS = -D$(BOARD) $(COMPILE_OPTS)
|
||||
|
||||
#---------------- Compiler Options C ----------------
|
||||
# -g*: generate debugging information
|
||||
# -O*: optimization level
|
||||
# -f...: tuning, see GCC manual
|
||||
# -Wall...: warning level
|
||||
# -Wa,...: tell GCC to pass this to the assembler.
|
||||
# -alhms...: create assembler listing
|
||||
CFLAGS = -g$(DEBUG)
|
||||
CFLAGS += $(CDEFS)
|
||||
CFLAGS += -O$(OPT)
|
||||
CFLAGS += -Wall
|
||||
CFLAGS += -Wno-unused
|
||||
CFLAGS += -Wno-comments
|
||||
CFLAGS += -fmessage-length=0
|
||||
CFLAGS += -fno-builtin
|
||||
CFLAGS += -ffunction-sections
|
||||
CFLAGS += -Wextra
|
||||
CFLAGS += -D__thumb2__=1
|
||||
CFLAGS += -msoft-float
|
||||
CFLAGS += -mno-sched-prolog
|
||||
CFLAGS += -fno-hosted
|
||||
CFLAGS += -mtune=cortex-m3
|
||||
#CFLAGS += -march=armv7e-m
|
||||
CFLAGS += -mfix-cortex-m3-ldrd
|
||||
#CFLAGS += -Wundef
|
||||
#CFLAGS += -funsigned-char
|
||||
#CFLAGS += -funsigned-bitfields
|
||||
#CFLAGS += -fno-inline-small-functions
|
||||
#CFLAGS += -fpack-struct
|
||||
#CFLAGS += -fshort-enums
|
||||
#CFLAGS += -Wstrict-prototypes
|
||||
#CFLAGS += -fno-unit-at-a-time
|
||||
#CFLAGS += -Wunreachable-code
|
||||
#CFLAGS += -Wsign-compare
|
||||
CFLAGS += -Wa,-alhms=$(<:%.c=$(OBJDIR)/%.lst)
|
||||
CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
|
||||
CFLAGS += $(CSTANDARD)
|
||||
|
||||
#---------------- Compiler Options C++ ----------------
|
||||
# -g*: generate debugging information
|
||||
# -O*: optimization level
|
||||
# -f...: tuning, see GCC manual
|
||||
# -Wall...: warning level
|
||||
# -Wa,...: tell GCC to pass this to the assembler.
|
||||
# -alhms...: create assembler listing
|
||||
CPPFLAGS = -g$(DEBUG)
|
||||
CPPFLAGS += $(CPPDEFS)
|
||||
CPPFLAGS += -O$(OPT)
|
||||
#CPPFLAGS += -funsigned-char
|
||||
#CPPFLAGS += -funsigned-bitfields
|
||||
#CPPFLAGS += -fpack-struct
|
||||
#CPPFLAGS += -fshort-enums
|
||||
#CPPFLAGS += -fno-exceptions
|
||||
CPPFLAGS += -Wall
|
||||
#CFLAGS += -Wundef
|
||||
#CPPFLAGS += -mshort-calls
|
||||
#CPPFLAGS += -fno-unit-at-a-time
|
||||
#CPPFLAGS += -Wstrict-prototypes
|
||||
#CPPFLAGS += -Wunreachable-code
|
||||
#CPPFLAGS += -Wsign-compare
|
||||
CPPFLAGS += -Wa,-alhms=$(<:%.cpp=$(OBJDIR)/%.lst)
|
||||
CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
|
||||
#CPPFLAGS += $(CSTANDARD)
|
||||
CPPFLAGS += -fno-exceptions
|
||||
CPPFLAGS += -fno-rtti
|
||||
CPPFLAGS += -fno-threadsafe-statics
|
||||
CPPFLAGS += -Wextra
|
||||
CPPFLAGS += -Weffc++
|
||||
|
||||
#---------------- Assembler Options ----------------
|
||||
# -Wa,...: tell GCC to pass this to the assembler.
|
||||
# -alhms: create listing
|
||||
# -gstabs: have the assembler create line number information
|
||||
# -listing-cont-lines: Sets the maximum number of continuation lines of hex
|
||||
# dump that will be displayed for a given single line of source input.
|
||||
ASFLAGS = -g$(DEBUG) $(ADEFS) -I. -alhms=$(<:%.S=$(OBJDIR)/%.lst)
|
||||
|
||||
#---------------- Library Options ----------------
|
||||
|
||||
# List any extra directories to look for libraries here.
|
||||
# Each directory must be seperated by a space.
|
||||
# Use forward slashes for directory separators.
|
||||
# For a directory that has spaces, enclose it in quotes.
|
||||
EXTRALIBDIRS = $(LIBS_PATH)
|
||||
|
||||
#---------------- Linker Options ----------------
|
||||
# -Wl,...: tell GCC to pass this to linker.
|
||||
# -Map: create map file
|
||||
# --cref: add cross reference to map file
|
||||
LDFLAGS = -Wl,-Map=$(TARGET).map
|
||||
#LDFLAGS += -Wl,--relax
|
||||
#LDFLAGS += --gc-sections
|
||||
LDFLAGS += $(patsubst %,-L%,$(EXTRALIBDIRS))
|
||||
LDFLAGS += -static
|
||||
LDFLAGS += -Wl,--start-group
|
||||
#LDFLAGS += -L$(THUMB2GNULIB) -L$(THUMB2GNULIB2)
|
||||
LDFLAGS += -lc -lg -lstdc++ -lsupc++
|
||||
LDFLAGS += -lgcc -lm
|
||||
LDFLAGS += -Wl,--end-group
|
||||
|
||||
#---------------- Programming Options ----------------
|
||||
LPCISP ?= ~/src/lpc21isp/lpc21isp
|
||||
PROGDEV ?= /dev/ttyUSB0
|
||||
|
||||
#============================================================================
|
||||
|
||||
# Define programs and commands.
|
||||
CC = arm-none-eabi-gcc
|
||||
LD = arm-none-eabi-gcc -T
|
||||
AS = arm-none-eabi-as
|
||||
OBJCOPY = arm-none-eabi-objcopy
|
||||
OBJDUMP = arm-none-eabi-objdump
|
||||
READELF = arm-none-eabi-readelf
|
||||
SIZE = arm-none-eabi-size
|
||||
AR = arm-none-eabi-ar -r
|
||||
NM = arm-none-eabi-nm
|
||||
PYTHON = /usr/bin/env python2
|
||||
REMOVE = rm -f
|
||||
|
||||
# Define Messages
|
||||
# English
|
||||
MSG_BEGIN = -------- begin --------
|
||||
MSG_END = -------- end --------
|
||||
MSG_SIZE_BEFORE = Size before:
|
||||
MSG_SIZE_AFTER = Size after:
|
||||
MSG_FLASH = Creating load file for Flash:
|
||||
MSG_DFU = Creating DFU firmware file:
|
||||
MSG_EEPROM = Creating load file for EEPROM:
|
||||
MSG_EXTENDED_LISTING = Creating Extended Listing:
|
||||
MSG_SYMBOL_TABLE = Creating Symbol Table:
|
||||
MSG_LINKING = Linking:
|
||||
MSG_COMPILING = Compiling C:
|
||||
MSG_COMPILING_CPP = Compiling C++:
|
||||
MSG_ASSEMBLING = Assembling:
|
||||
MSG_CLEANING = Cleaning project:
|
||||
MSG_CREATING_LIBRARY = Creating library:
|
||||
|
||||
# Define all object files.
|
||||
OBJ = $(SRC:%.c=$(OBJDIR)/%.o) $(CPPSRC:%.cpp=$(OBJDIR)/%.o) $(ASRC:%.S=$(OBJDIR)/%.o)
|
||||
|
||||
# Define all listing files.
|
||||
LST = $(SRC:%.c=$(OBJDIR)/%.lst) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst) $(ASRC:%.S=$(OBJDIR)/%.lst)
|
||||
|
||||
# Compiler flags to generate dependency files.
|
||||
GENDEPFLAGS = -MMD -MP -MD
|
||||
|
||||
# Combine all necessary flags and optional flags.
|
||||
# Add target processor to flags.
|
||||
ALL_CFLAGS = -mcpu=$(CPU) -$(CPU_MODE) $(CPU_FLAGS) -I. $(CFLAGS) $(GENDEPFLAGS)
|
||||
ALL_CPPFLAGS = -mcpu=$(CPU) -$(CPU_MODE) $(CPU_FLAGS) -I. -x c++ $(CPPFLAGS) $(GENDEPFLAGS)
|
||||
ALL_ASFLAGS = -mcpu=$(CPU) -$(CPU_MODE) $(CPU_FLAGS_ASM) $(ASFLAGS)
|
||||
# only difference between Linker flags and CFLAGS is CPU_FLAGS_ASM as -mapcs-frame is not needed
|
||||
ALL_CFLAGS_LINKER = -mcpu=$(CPU) -$(CPU_MODE) $(CPU_FLAGS_ASM)
|
||||
|
||||
# Default target.
|
||||
all: begin gccversion sizebefore build showtarget sizeafter end
|
||||
|
||||
# Change the build target to build a HEX file or a library.
|
||||
build: elf hex bin srec lss sym
|
||||
#build: lib
|
||||
|
||||
elf: $(TARGET).elf
|
||||
hex: $(TARGET).hex
|
||||
bin: $(TARGET).bin
|
||||
srec: $(TARGET).srec
|
||||
eep: $(TARGET).eep
|
||||
lss: $(TARGET).lss
|
||||
sym: $(TARGET).sym
|
||||
LIBNAME=lib$(TARGET).a
|
||||
lib: $(LIBNAME)
|
||||
|
||||
# Eye candy.
|
||||
begin:
|
||||
@echo
|
||||
@echo $(MSG_BEGIN)
|
||||
|
||||
end:
|
||||
@echo $(MSG_END)
|
||||
@echo
|
||||
|
||||
# Display size of file.
|
||||
ELFSIZE = $(SIZE) $(FORMAT_FLAG) $(TARGET).elf
|
||||
|
||||
sizebefore:
|
||||
@if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \
|
||||
2>/dev/null; echo; fi
|
||||
|
||||
sizeafter:
|
||||
@if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \
|
||||
2>/dev/null; echo; fi
|
||||
|
||||
showtarget:
|
||||
@echo
|
||||
@echo --------- Target Information ---------
|
||||
@echo ARM Model: $(CPU)
|
||||
@echo Board: $(BOARD)
|
||||
@echo --------------------------------------
|
||||
|
||||
# Display compiler version information.
|
||||
gccversion:
|
||||
@$(CC) --version
|
||||
|
||||
program: $(TARGET).hex
|
||||
$(LPCISP) -control $(TARGET).hex $(PROGDEV) 230400 4000
|
||||
|
||||
# Create final output files (.hex, .eep) from ELF output file.
|
||||
%.hex: %.elf
|
||||
@echo
|
||||
@echo $(MSG_FLASH) $@
|
||||
$(OBJCOPY) -O $(FORMAT) $< $@
|
||||
%.images: %.bin %.hex %.srec %.list
|
||||
@#echo "*** $* images generated ***"
|
||||
|
||||
%.bin: %.elf
|
||||
@echo
|
||||
@echo $(MSG_FLASH) $@
|
||||
$(OBJCOPY) -O binary $< $(TARGET).bin
|
||||
@#printf " OBJCOPY $(*).bin\n"
|
||||
$(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin
|
||||
|
||||
%.hex: %.elf
|
||||
@#printf " OBJCOPY $(*).hex\n"
|
||||
$(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex
|
||||
|
||||
%.srec: %.elf
|
||||
@echo
|
||||
@echo $(MSG_FLASH) $@
|
||||
$(OBJCOPY) -O srec $< $(TARGET).srec
|
||||
@#printf " OBJCOPY $(*).srec\n"
|
||||
$(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec
|
||||
|
||||
%.eep: %.elf
|
||||
@echo
|
||||
@echo $(MSG_EEPROM) $@
|
||||
-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
|
||||
--change-section-lma .eeprom=0 --no-change-warnings -O $(FORMAT) $< $@ || exit 0
|
||||
%.list: %.elf
|
||||
@#printf " OBJDUMP $(*).list\n"
|
||||
$(Q)$(OBJDUMP) -S $(*).elf > $(*).list
|
||||
|
||||
# Create extended listing file from ELF output file.
|
||||
%.lss: %.elf
|
||||
@echo
|
||||
@echo $(MSG_EXTENDED_LISTING) $@
|
||||
$(OBJDUMP) -h -z -S $< > $@
|
||||
%.elf: $(OBJS) $(LDSCRIPT) $(LIBOPENCM3)/lib/libopencm3_lpc43xx.a
|
||||
@#printf " LD $(subst $(shell pwd)/,,$(@))\n"
|
||||
$(Q)$(LD) $(LDFLAGS) -o $(*).elf $(OBJS) -lopencm3_lpc43xx
|
||||
|
||||
# Create a symbol table from ELF output file.
|
||||
%.sym: %.elf
|
||||
@echo
|
||||
@echo $(MSG_SYMBOL_TABLE) $@
|
||||
$(NM) -n $< > $@
|
||||
%.o: %.c Makefile
|
||||
@#printf " CC $(subst $(shell pwd)/,,$(@))\n"
|
||||
$(Q)$(CC) $(CFLAGS) -o $@ -c $<
|
||||
|
||||
# Create library from object files.
|
||||
.SECONDARY : $(TARGET).a
|
||||
.PRECIOUS : $(OBJ)
|
||||
%.a: $(OBJ)
|
||||
@echo
|
||||
@echo $(MSG_CREATING_LIBRARY) $@
|
||||
$(AR) $@ $(OBJ)
|
||||
clean:
|
||||
$(Q)rm -f *.o
|
||||
$(Q)rm -f *.d
|
||||
$(Q)rm -f *.elf
|
||||
$(Q)rm -f *.bin
|
||||
$(Q)rm -f *.hex
|
||||
$(Q)rm -f *.srec
|
||||
$(Q)rm -f *.list
|
||||
$(Q)rm -f *.map
|
||||
$(Q)rm -f *.lst
|
||||
|
||||
# Link: create ELF output file from object files.
|
||||
.SECONDARY : $(TARGET).elf
|
||||
.PRECIOUS : $(OBJ)
|
||||
%.elf: $(OBJ)
|
||||
@echo
|
||||
@echo $(MSG_LINKING) $@
|
||||
$(LD) $(LINKER_SCRIPT) $(ALL_CFLAGS_LINKER) $(LDFLAGS) -o $@ $^
|
||||
.PHONY: images clean
|
||||
|
||||
# Compile: create object files from C source files.
|
||||
$(OBJDIR)/%.o : %.c
|
||||
@echo
|
||||
@echo $(MSG_COMPILING) $<
|
||||
$(CC) -c $(ALL_CFLAGS) $< -o $@
|
||||
|
||||
# Compile: create object files from C++ source files.
|
||||
$(OBJDIR)/%.o : %.cpp
|
||||
@echo
|
||||
@echo $(MSG_COMPILING_CPP) $<
|
||||
$(CC) -c $(ALL_CPPFLAGS) $< -o $@
|
||||
|
||||
# Compile: create assembler files from C source files.
|
||||
%.s : %.c
|
||||
$(AS) -S $(ALL_CFLAGS) $< -o $@
|
||||
|
||||
# Compile: create assembler files from C++ source files.
|
||||
%.s : %.cpp
|
||||
$(CC) -S $(ALL_CPPFLAGS) $< -o $@
|
||||
|
||||
# Assemble: create object files from assembler source files.
|
||||
$(OBJDIR)/%.o : %.S
|
||||
@echo
|
||||
@echo $(MSG_ASSEMBLING) $<
|
||||
$(AS) $< $(ALL_ASFLAGS) --MD $(OBJDIR)/$(@F).d -o $@
|
||||
|
||||
# Create preprocessed source for use in sending a bug report.
|
||||
%.i : %.c
|
||||
$(CC) -E -mmcu=$(CPU) -I. $(CFLAGS) $< -o $@
|
||||
|
||||
# Target: clean project.
|
||||
clean: begin clean_list clean_binary end
|
||||
|
||||
clean_binary:
|
||||
$(REMOVE) $(TARGET).hex
|
||||
|
||||
clean_list:
|
||||
@echo $(MSG_CLEANING)
|
||||
$(REMOVE) $(TARGET).eep
|
||||
$(REMOVE) $(TARGET)eep.hex
|
||||
$(REMOVE) $(TARGET).cof
|
||||
$(REMOVE) $(TARGET).elf
|
||||
$(REMOVE) $(TARGET).map
|
||||
$(REMOVE) $(TARGET).sym
|
||||
$(REMOVE) $(TARGET).lss
|
||||
$(REMOVE) $(SRC:%.c=$(OBJDIR)/%.o)
|
||||
$(REMOVE) $(CPPSRC:%.cpp=$(OBJDIR)/%.o)
|
||||
$(REMOVE) $(SRC:%.c=$(OBJDIR)/%.lst)
|
||||
$(REMOVE) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst)
|
||||
$(REMOVE) $(ASRC:%.S=$(OBJDIR)/%.lst)
|
||||
$(REMOVE) $(ASRC:%.S=$(OBJDIR)/%.o)
|
||||
$(REMOVE) $(ASRC:%.S=$(OBJDIR)/%.o.d)
|
||||
$(REMOVE) *.o.d
|
||||
$(REMOVE) $(SRC:.c=.s)
|
||||
$(REMOVE) $(SRC:.c=.d)
|
||||
$(REMOVE) $(CPPSRC:.cpp=.d)
|
||||
$(REMOVE) $(SRC:.c=.i)
|
||||
$(REMOVE) InvalidEvents.tmp
|
||||
$(REMOVE) $(TARGET).bin
|
||||
$(REMOVE) $(TARGET).srec
|
||||
|
||||
doxygen:
|
||||
@echo Generating Project Documentation...
|
||||
@doxygen Doxygen.conf
|
||||
@echo Documentation Generation Complete.
|
||||
|
||||
clean_doxygen:
|
||||
rm -rf Documentation
|
||||
|
||||
# Create object files directory
|
||||
$(shell mkdir $(OBJDIR)/ 2>/dev/null)
|
||||
|
||||
# Listing of phony targets.
|
||||
.PHONY : all showtarget begin end sizebefore sizeafter \
|
||||
gccversion build elf hex eep lss sym program clean \
|
||||
clean_list clean_binary doxygen
|
||||
-include $(OBJS:.o=.d)
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
/*
|
||||
* Copyright 2010 - 2012 Michael Ossmann
|
||||
* Copyright 2012 Michael Ossmann
|
||||
* Copyright 2012 Jared Boone
|
||||
*
|
||||
* This file is part of HackRF.
|
||||
*
|
||||
@ -20,37 +21,119 @@
|
||||
*/
|
||||
|
||||
#include "hackrf_core.h"
|
||||
#include "si5351c.h"
|
||||
#include <libopencm3/lpc43xx/cgu.h>
|
||||
|
||||
void gpio_init()
|
||||
#ifdef JELLYBEAN
|
||||
|
||||
void delay(uint32_t duration)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < duration; i++)
|
||||
__asm__("nop");
|
||||
}
|
||||
|
||||
/* clock startup for Jellybean with Lemondrop attached */
|
||||
void cpu_clock_init(void)
|
||||
{
|
||||
//FIXME I2C setup
|
||||
|
||||
si5351c_disable_all_outputs();
|
||||
si5351c_disable_oeb_pin_control();
|
||||
si5351c_power_down_all_clocks();
|
||||
si5351c_set_crystal_configuration();
|
||||
si5351c_enable_xo_and_ms_fanout();
|
||||
si5351c_configure_pll_sources_for_xtal();
|
||||
si5351c_configure_pll1_multisynth();
|
||||
|
||||
/* MS0/CLK0 is the source for the MAX2837 clock input. */
|
||||
si5351c_configure_multisynth(0, 2048, 0, 1); /* 40MHz */
|
||||
|
||||
/* MS1/CLK1 is the source for the MAX5864 codec. */
|
||||
si5351c_configure_multisynth(1, 4608, 0, 1); /* 20MHz */
|
||||
|
||||
/* MS4/CLK4 is the source for the LPC43xx microcontroller. */
|
||||
si5351c_configure_multisynth(4, 8021, 1, 3); /* 12MHz */
|
||||
|
||||
si5351c_configure_clock_control();
|
||||
si5351c_enable_clock_outputs();
|
||||
|
||||
//FIXME disable I2C
|
||||
|
||||
/*
|
||||
* Basic GPIO setup for all pins. This shouldn't be necessary after a
|
||||
* reset, but we might get called at other times.
|
||||
* 12MHz clock is entering LPC XTAL1/OSC input now.
|
||||
* Set up PLL1 to run from XTAL1 input.
|
||||
*/
|
||||
all_pins_off();
|
||||
|
||||
/* set certain pins as outputs, all others inputs */
|
||||
GPIO_DIR2 = (PIN_LED1 | PIN_LED2 | PIN_LED3);
|
||||
//FIXME a lot of the details here should be in a CGU driver
|
||||
|
||||
/* set certain pins as outputs, all others inputs */
|
||||
GPIO_DIR3 = (PIN_EN1V8);
|
||||
/* configure xtal oscillator for external clock input signal */
|
||||
CGU_XTAL_OSC_CTRL |= CGU_XTAL_OSC_CTRL_BYPASS;
|
||||
|
||||
/* set xtal oscillator to low frequency mode */
|
||||
CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF;
|
||||
|
||||
/* power on the oscillator and wait until stable */
|
||||
CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_ENABLE;
|
||||
delay(1000000);
|
||||
|
||||
/* use XTAL_OSC as clock source for BASE_M4_CLK (CPU) */
|
||||
CGU_BASE_M4_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_BASE_CLK_SEL_SHIFT));
|
||||
|
||||
/* use XTAL_OSC as clock source for APB1 */
|
||||
CGU_BASE_APB1_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_BASE_CLK_SEL_SHIFT));
|
||||
|
||||
/* use XTAL_OSC as clock source for PLL1 */
|
||||
CGU_PLL1_CTRL = (CGU_PLL1_CTRL_PD
|
||||
| CGU_PLL1_CTRL_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_PLL1_CTRL_CLK_SEL_SHIFT));
|
||||
while (CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK);
|
||||
|
||||
//FIXME this may need to be done in several stages
|
||||
/* configure PLL1 to produce 204 MHz clock from 12 MHz XTAL_OSC */
|
||||
CGU_PLL1_CTRL |= (CGU_PLL1_CTRL_PD
|
||||
| CGU_PLL1_CTRL_FBSEL
|
||||
| CGU_PLL1_CTRL_DIRECT
|
||||
| (0 << CGU_PLL1_CTRL_PSEL_SHIFT)
|
||||
| (0 << CGU_PLL1_CTRL_NSEL_SHIFT)
|
||||
| (16 << CGU_PLL1_CTRL_MSEL_SHIFT));
|
||||
|
||||
/* power on PLL1 and wait until stable */
|
||||
CGU_PLL1_CTRL &= ~CGU_PLL1_CTRL_PD;
|
||||
while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK));
|
||||
|
||||
/* use PLL1 as clock source for BASE_M4_CLK (CPU) */
|
||||
CGU_BASE_M4_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT));
|
||||
|
||||
/* use XTAL_OSC as clock source for PLL0USB */
|
||||
CGU_PLL0USB_CTRL = (CGU_PLL0USB_CTRL_PD
|
||||
| CGU_PLL0USB_CTRL_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT));
|
||||
while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK);
|
||||
|
||||
/* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
|
||||
CGU_PLL0USB_MDIV = ((0x07FFA << CGU_PLL0USB_MDIV_MDEC_SHIFT)
|
||||
| (0x0B << CGU_PLL0USB_SELP_MDEC_SHIFT)
|
||||
| (0x10 << CGU_PLL0USB_SELI_MDEC_SHIFT)
|
||||
| (0x0 << CGU_PLL0USB_SELR_MDEC_SHIFT));
|
||||
CGU_PLL0USB_NP_DIV = (98 << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)
|
||||
| (514 << CGU_PLL0USB_NP_DIV_NDEC_SHIFT);
|
||||
CGU_PLL0USB_CTRL |= (CGU_PLL0USB_CTRL_PD
|
||||
| CGU_PLL0USB_CTRL_DIRECTI
|
||||
| CGU_PLL0USB_CTRL_DIRECTO
|
||||
| CGU_PLL0USB_CTRL_CLKEN);
|
||||
|
||||
/* power on PLL0USB and wait until stable */
|
||||
CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD;
|
||||
while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK));
|
||||
|
||||
/* use PLL0USB as clock source for USB0 */
|
||||
CGU_BASE_USB0_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_PLL0USB << CGU_BASE_CLK_SEL_SHIFT));
|
||||
}
|
||||
|
||||
void all_pins_off(void)
|
||||
{
|
||||
/* configure all pins for GPIO? */
|
||||
|
||||
/* configure all pins as inputs */
|
||||
GPIO_PIN0 = 0;
|
||||
GPIO_PIN1 = 0;
|
||||
GPIO_PIN2 = 0;
|
||||
GPIO_PIN3 = 0;
|
||||
GPIO_PIN4 = 0;
|
||||
GPIO_PIN5 = 0;
|
||||
GPIO_PIN6 = 0;
|
||||
GPIO_PIN7 = 0;
|
||||
|
||||
/* pull-up on every pin? */
|
||||
|
||||
/* set all outputs low? */
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
/*
|
||||
* Copyright 2010 - 2012 Michael Ossmann
|
||||
* Copyright 2012 Michael Ossmann <mike@ossmann.com>
|
||||
* Copyright 2012 Benjamin Vernoux <titanmkd@gmail.com>
|
||||
*
|
||||
* This file is part of HackRF.
|
||||
*
|
||||
@ -22,7 +23,10 @@
|
||||
#ifndef __HACKRF_CORE_H
|
||||
#define __HACKRF_CORE_H
|
||||
|
||||
#include "lpc43.h"
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/* hardware identification number */
|
||||
#define BOARD_ID_JELLYBEAN 0
|
||||
@ -31,45 +35,76 @@
|
||||
#define BOARD_ID BOARD_ID_JELLYBEAN
|
||||
#endif
|
||||
|
||||
/* GPIO pins */
|
||||
//#ifdef JELLYBEAN
|
||||
#define PIN_LED1 (1 << 1) /* GPIO2[1] on P4_1 */
|
||||
#define PIN_LED2 (1 << 2) /* GPIO2[2] on P4_2 */
|
||||
#define PIN_LED3 (1 << 8) /* GPIO2[8] on P6_12 */
|
||||
#ifdef JELLYBEAN
|
||||
/*
|
||||
* Jellybean SCU PinMux
|
||||
*/
|
||||
|
||||
#define PIN_EN1V8 (1 << 6) /* GPIO3[6] on P6_10 */
|
||||
/* GPIO Output PinMux */
|
||||
#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */
|
||||
#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */
|
||||
#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */
|
||||
|
||||
#define PIN_BOOT0 (1 << 8) /* GPIO0[8] on P1_1 */
|
||||
#define PIN_BOOT1 (1 << 9) /* GPIO0[9] on P1_2 */
|
||||
#define PIN_BOOT2 (1 << 7) /* GPIO5[7] on P2_8 */
|
||||
#define PIN_BOOT3 (1 << 10) /* GPIO1[10] on P2_9 */
|
||||
//#endif
|
||||
#define SCU_PINMUX_EN1V8 (P6_10) /* GPIO3[6] on P6_10 */
|
||||
|
||||
/* GPIO Input PinMux */
|
||||
#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */
|
||||
#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */
|
||||
#define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */
|
||||
#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
|
||||
|
||||
/* SSP1 Peripheral PinMux */
|
||||
#define SCU_SSP1_MISO (P1_3) /* P1_3 */
|
||||
#define SCU_SSP1_MOSI (P1_4) /* P1_4 */
|
||||
#define SCU_SSP1_SCK (P1_19) /* P1_19 */
|
||||
#define SCU_SSP1_SSEL (P1_20) /* P1_20 */
|
||||
|
||||
/* TODO add other Pins */
|
||||
|
||||
/*
|
||||
* Jellybean GPIO Pins
|
||||
*/
|
||||
|
||||
/* GPIO Output */
|
||||
#define PIN_LED1 (BIT1) /* GPIO2[1] on P4_1 */
|
||||
#define PIN_LED2 (BIT2) /* GPIO2[2] on P4_2 */
|
||||
#define PIN_LED3 (BIT8) /* GPIO2[8] on P6_12 */
|
||||
#define PORT_LED1_3 (GPIO2) /* PORT for LED1, 2 & 3 */
|
||||
|
||||
#define PIN_EN1V8 (BIT6) /* GPIO3[6] on P6_10 */
|
||||
#define PORT_EN1V8 (GPIO3)
|
||||
|
||||
/* GPIO Input */
|
||||
#define PIN_BOOT0 (BIT8) /* GPIO0[8] on P1_1 */
|
||||
#define PIN_BOOT1 (BIT9) /* GPIO0[9] on P1_2 */
|
||||
#define PIN_BOOT2 (BIT7) /* GPIO5[7] on P2_8 */
|
||||
#define PIN_BOOT3 (BIT10) /* GPIO1[10] on P2_9 */
|
||||
|
||||
/* Read GPIO Pin */
|
||||
#define BOOT0_STATE ((GPIO0_PIN & PIN_BOOT0)==PIN_BOOT0)
|
||||
#define BOOT1_STATE ((GPIO0_PIN & PIN_BOOT1)==PIN_BOOT1)
|
||||
#define BOOT2_STATE ((GPIO5_PIN & PIN_BOOT2)==PIN_BOOT2)
|
||||
#define BOOT3_STATE ((GPIO1_PIN & PIN_BOOT3)==PIN_BOOT3)
|
||||
|
||||
/* indicator LED control */
|
||||
//#ifdef JELLYBEAN
|
||||
#define LED1 (GPIO_PIN2 & PIN_LED1)
|
||||
#define LED1_SET (GPIO_SET2 = PIN_LED1)
|
||||
#define LED1_CLR (GPIO_CLR2 = PIN_LED1)
|
||||
#define LED2 (GPIO_PIN2 & PIN_LED2)
|
||||
#define LED2_SET (GPIO_SET2 = PIN_LED2)
|
||||
#define LED2_CLR (GPIO_CLR2 = PIN_LED2)
|
||||
#define LED3 (GPIO_PIN2 & PIN_LED3)
|
||||
#define LED3_SET (GPIO_SET2 = PIN_LED3)
|
||||
#define LED3_CLR (GPIO_CLR2 = PIN_LED3)
|
||||
|
||||
#define EN1V8 (GPIO_PIN3 & PIN_EN1V8)
|
||||
/* 1V8 control */
|
||||
#define EN1V8_SET (GPIO_SET3 = PIN_EN1V8)
|
||||
#define EN1V8_CLR (GPIO_CLR3 = PIN_EN1V8)
|
||||
|
||||
/* Input GPIO BOOT0 to 3 */
|
||||
#define BOOT0 (GPIO_PIN0 & PIN_BOOT0)
|
||||
#define BOOT1 (GPIO_PIN0 & PIN_BOOT1)
|
||||
#define BOOT2 (GPIO_PIN5 & PIN_BOOT2)
|
||||
#define BOOT3 (GPIO_PIN1 & PIN_BOOT3)
|
||||
/* TODO add other Pins */
|
||||
#endif
|
||||
|
||||
//#endif
|
||||
void cpu_clock_init(void);
|
||||
|
||||
void gpio_init(void);
|
||||
void all_pins_off(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __HACKRF_CORE_H */
|
||||
|
||||
@ -1,133 +0,0 @@
|
||||
/*
|
||||
* Copyright 2012 Michael Ossmann
|
||||
* Copyright 2012 Jared Boone
|
||||
*
|
||||
* This file is part of HackRF.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "si5351c.h"
|
||||
|
||||
void delay(uint32_t duration)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < duration; i++)
|
||||
__asm__("nop");
|
||||
}
|
||||
|
||||
/* initial configuration for Jellybean with Lemondrop attached */
|
||||
void jellybean_init(void)
|
||||
{
|
||||
//FIXME I2C setup
|
||||
|
||||
si5351c_disable_all_outputs();
|
||||
si5351c_disable_oeb_pin_control();
|
||||
si5351c_power_down_all_clocks();
|
||||
si5351c_set_crystal_configuration();
|
||||
si5351c_enable_xo_and_ms_fanout();
|
||||
si5351c_configure_pll_sources_for_xtal();
|
||||
si5351c_configure_pll1_multisynth();
|
||||
|
||||
/* MS0/CLK0 is the source for the MAX2837 clock input. */
|
||||
si5351c_configure_multisynth(0, 2048, 0, 1); /* 40MHz */
|
||||
|
||||
/* MS1/CLK1 is the source for the MAX5864 codec. */
|
||||
si5351c_configure_multisynth(1, 4608, 0, 1); /* 20MHz */
|
||||
|
||||
/* MS4/CLK4 is the source for the LPC43xx microcontroller. */
|
||||
si5351c_configure_multisynth(4, 8021, 1, 3); /* 12MHz */
|
||||
|
||||
si5351c_configure_clock_control();
|
||||
si5351c_enable_clock_outputs();
|
||||
|
||||
//FIXME disable I2C
|
||||
|
||||
/*
|
||||
* 12MHz clock is entering LPC XTAL1/OSC input now.
|
||||
* Set up PLL1 to run from XTAL1 input.
|
||||
*/
|
||||
|
||||
//FIXME a lot of the details here should be in a CGU driver
|
||||
|
||||
/* configure xtal oscillator for external clock input signal */
|
||||
CGU_XTAL_OSC_CTRL |= CGU_XTAL_OSC_CTRL_BYPASS;
|
||||
|
||||
/* set xtal oscillator to low frequency mode */
|
||||
CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF;
|
||||
|
||||
/* power on the oscillator and wait until stable */
|
||||
CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_EN;
|
||||
delay(1000000);
|
||||
|
||||
/* use XTAL_OSC as clock source for BASE_M4_CLK (CPU) */
|
||||
CGU_BASE_M4_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_BASE_CLK_SEL_SHIFT));
|
||||
|
||||
/* use XTAL_OSC as clock source for APB1 */
|
||||
CGU_BASE_APB1_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_BASE_CLK_SEL_SHIFT));
|
||||
|
||||
/* use XTAL_OSC as clock source for PLL1 */
|
||||
CGU_PLL1_CTRL = (CGU_PLL1_CTRL_PD
|
||||
| CGU_PLL1_CTRL_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_PLL1_CTRL_CLK_SEL_SHIFT));
|
||||
while (CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK);
|
||||
|
||||
//FIXME this may need to be done in several stages
|
||||
/* configure PLL1 to produce 204 MHz clock from 12 MHz XTAL_OSC */
|
||||
CGU_PLL1_CTRL |= (CGU_PLL1_CTRL_PD
|
||||
| CGU_PLL1_CTRL_FBSEL
|
||||
| CGU_PLL1_CTRL_DIRECT
|
||||
| (0 << CGU_PLL1_CTRL_PSEL_SHIFT)
|
||||
| (0 << CGU_PLL1_CTRL_NSEL_SHIFT)
|
||||
| (16 << CGU_PLL1_CTRL_MSEL_SHIFT));
|
||||
|
||||
/* power on PLL1 and wait until stable */
|
||||
CGU_PLL1_CTRL &= ~CGU_PLL1_CTRL_PD;
|
||||
while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK));
|
||||
|
||||
/* use PLL1 as clock source for BASE_M4_CLK (CPU) */
|
||||
CGU_BASE_M4_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT));
|
||||
|
||||
/* use XTAL_OSC as clock source for PLL0USB */
|
||||
CGU_PLL0USB_CTRL = (CGU_PLL0USB_CTRL_PD
|
||||
| CGU_PLL0USB_CTRL_AUTOBLOCK
|
||||
| (CGU_SRC_XTAL << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT));
|
||||
while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK);
|
||||
|
||||
/* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
|
||||
CGU_PLL0USB_MDIV = ((0x07FFA << CGU_PLL0USB_MDIV_MDEC_SHIFT)
|
||||
| (0x0B << CGU_PLL0USB_SELP_MDEC_SHIFT)
|
||||
| (0x10 << CGU_PLL0USB_SELI_MDEC_SHIFT)
|
||||
| (0x0 << CGU_PLL0USB_SELR_MDEC_SHIFT));
|
||||
CGU_PLL0USB_NP_DIV = (98 << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)
|
||||
| (514 << CGU_PLL0USB_NP_DIV_NDEC_SHIFT);
|
||||
CGU_PLL0USB_CTRL |= (CGU_PLL0USB_CTRL_PD
|
||||
| CGU_PLL0USB_CTRL_DIRECTI
|
||||
| CGU_PLL0USB_CTRL_DIRECTO
|
||||
| CGU_PLL0USB_CTRL_CLKEN);
|
||||
|
||||
/* power on PLL0USB and wait until stable */
|
||||
CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD;
|
||||
while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK));
|
||||
|
||||
/* use PLL0USB as clock source for USB0 */
|
||||
CGU_BASE_USB0_CLK = (CGU_BASE_CLK_AUTOBLOCK
|
||||
| (CGU_SRC_PLL0USB << CGU_BASE_CLK_SEL_SHIFT));
|
||||
}
|
||||
@ -20,10 +20,9 @@
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "si5351c.h"
|
||||
#include <libopencm3/lpc43xx/i2c.h>
|
||||
|
||||
#define SI5351C_I2C_ADDR (0x60 << 1)
|
||||
|
||||
/* FIXME return i2c0 status from each function */
|
||||
|
||||
/* write to single register */
|
||||
@ -37,7 +36,7 @@ void si5351c_write_single(uint8_t reg, uint8_t val)
|
||||
}
|
||||
|
||||
/* read single register */
|
||||
uint8_t si5351c_read_reg(uint8_t reg)
|
||||
uint8_t si5351c_read_single(uint8_t reg)
|
||||
{
|
||||
uint8_t val;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user