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Replaced apparently incorrect PLL0USB MDIV and NP_DIV values with values straight out of the User Manual's table 94.

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This commit is contained in:
Jared Boone
2012-09-27 19:29:43 -07:00
parent aaaf14819a
commit a975fbc577
1 changed files with 3 additions and 6 deletions
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9
firmware/common/hackrf_core.c
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@ -179,12 +179,9 @@ void cpu_clock_init(void)
while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK); while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK);
/* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */ /* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
CGU_PLL0USB_MDIV = CGU_PLL0USB_MDIV_MDEC(0x07FFA) /* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */
| CGU_PLL0USB_MDIV_SELP(0x0B) CGU_PLL0USB_MDIV = 0x06167FFA;
| CGU_PLL0USB_MDIV_SELI(0x10) CGU_PLL0USB_NP_DIV = 0x00302062;
| CGU_PLL0USB_MDIV_SELR(0x0);
CGU_PLL0USB_NP_DIV = CGU_PLL0USB_NP_DIV_PDEC(98)
| CGU_PLL0USB_NP_DIV_NDEC(514);
CGU_PLL0USB_CTRL |= (CGU_PLL0USB_CTRL_PD CGU_PLL0USB_CTRL |= (CGU_PLL0USB_CTRL_PD
| CGU_PLL0USB_CTRL_DIRECTI | CGU_PLL0USB_CTRL_DIRECTI
| CGU_PLL0USB_CTRL_DIRECTO | CGU_PLL0USB_CTRL_DIRECTO