Don't update buffer pointer until after checking for shortfall.
The buffer pointer is not needed in the shortfall paths. Moving this update after the shortfall checks saves 3 cycles in each shortfall path.
This commit is contained in:
@ -67,9 +67,9 @@ shadow registers.
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There are four key code paths, with the following worst-case timings:
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RX, normal: 143 cycles
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RX, overrun: 72 cycles
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RX, overrun: 69 cycles
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TX, normal: 132 cycles
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TX, underrun: 139 cycles
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TX, underrun: 136 cycles
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Design
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======
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@ -310,9 +310,6 @@ tx_loop:
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// Wait for and clear SGPIO interrupt.
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await_sgpio tx // await_sgpio() // 34
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// Update buffer pointer.
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update_buf_ptr // update_buf_ptr() // 3
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// Load mode, and return to idle if requested.
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mode .req r3
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ldr mode, [state, #MODE] // mode = state.mode // 2
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@ -334,6 +331,9 @@ tx_loop:
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sub buf_margin, #32 // buf_margin -= 32 // 1
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bmi tx_zeros // if buf_margin < 0: goto tx_zeros // 1 thru, 3 taken
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// Update buffer pointer.
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update_buf_ptr // update_buf_ptr() // 3
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// At this point we know there is TX data available.
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// If still in TX start mode, switch to TX run.
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cmp mode, #MODE_TX_START // if mode != TX_START: // 1
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@ -391,9 +391,6 @@ rx_loop:
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// Wait for and clear SGPIO interrupt.
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await_sgpio rx // await_sgpio() // 34
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// Update buffer pointer.
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update_buf_ptr // update_buf_ptr() // 3
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// Load mode, and return to idle if requested.
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mode .req r3
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ldr mode, [state, #MODE] // mode = state.mode // 2
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@ -419,6 +416,9 @@ rx_loop:
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sub buf_margin, count // buf_margin -= count // 1
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bmi rx_shortfall // if buf_margin < 0: goto rx_shortfall // 1 thru, 3 taken
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// Update buffer pointer.
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update_buf_ptr // update_buf_ptr() // 3
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// Read data from SGPIO.
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ldr r0, [sgpio_data, #SLICE0] // r0 = SGPIO_REG_SS[SLICE0] // 10
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ldr r1, [sgpio_data, #SLICE1] // r1 = SGPIO_REG_SS[SLICE1] // 10
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