Sojus07/hackrf
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Consolidate a few clock setup tasks that repeat among many projects into cpu_clock_init().

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This commit is contained in:
Jared Boone
2012-10-17 11:45:30 -07:00
parent 34b4729cfe
commit 63b1a25979
5 changed files with 8 additions and 26 deletions
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8
firmware/common/hackrf_core.c
View File

@ -194,6 +194,14 @@ void cpu_clock_init(void)
/* use PLL0USB as clock source for USB0 */
CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK
| CGU_BASE_USB0_CLK_CLK_SEL(CGU_SRC_PLL0USB);
/* Switch peripheral clock over to use PLL1 (204MHz) */
CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK
| CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
/* Switch APB1 clock over to use PLL1 (204MHz) */
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
}
void ssp1_init(void)

7
firmware/sgpio-rx/sgpio-rx.c
View File

@ -96,13 +96,6 @@ int main(void) {
pin_setup();
enable_1v8_power();
cpu_clock_init();
CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK
| CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
ssp1_init();
ssp1_set_mode_max2837();
max2837_setup();

6
firmware/sgpio/sgpio.c
View File

@ -72,12 +72,6 @@ int main(void) {
cpu_clock_init();
ssp1_init();
CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK
| CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
gpio_set(PORT_LED1_3, PIN_LED1);
ssp1_set_mode_max5864();

7
firmware/sgpio_passthrough_rom_to_ram/sgpio_passthrough.c
View File

@ -354,13 +354,6 @@ int main(void)
enable_1v8_power();
cpu_clock_init();
ssp1_init();
CGU_BASE_PERIPH_CLK = (CGU_BASE_CLK_AUTOBLOCK
| (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT));
CGU_BASE_APB1_CLK = (CGU_BASE_CLK_AUTOBLOCK
| (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT));
gpio_set(PORT_LED1_3, PIN_LED1);
//test_sgpio_sliceA_D();

6
firmware/usb_performance/usb_performance.c
View File

@ -394,12 +394,6 @@ int main(void) {
enable_1v8_power();
cpu_clock_init();
CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK
| CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
usb_peripheral_reset();
usb_device_init(0, &usb_device);