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Moved BSDL requirement to "program" requirements.

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This commit is contained in:
Jared Boone
2012-07-19 16:48:09 -07:00
parent 37ec0b09f8
commit 6121294550
1 changed files with 6 additions and 7 deletions
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13
hardware/jellybean/sgpio_if/README.md
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@ -1,4 +1,3 @@
CPLD interface between LPC43xx microcontroller SGPIO peripheral and MAX5864 CPLD interface between LPC43xx microcontroller SGPIO peripheral and MAX5864
RF codec. RF codec.
@ -9,12 +8,6 @@ To build this VHDL project and produce an SVF file for flashing the CPLD:
* Xilinx WebPACK 13.4 for Windows or Linux. * Xilinx WebPACK 13.4 for Windows or Linux.
* BSDL model files for Xilinx CoolRunner-II XC264A, available at xilinx.com,
in the "Device Models" Support Resources section of the CoolRunner-II
Product Support & Documentation page. Only one file from the BSDL package is
required, and the "program" script below expects it to be at the relative
path "bsdl/xc2c/xc2c64.bsd".
To program the SVF file into the CPLD: To program the SVF file into the CPLD:
* Dangerous Prototypes Bus Blaster v2: * Dangerous Prototypes Bus Blaster v2:
@ -23,6 +16,12 @@ To program the SVF file into the CPLD:
* urJTAG built with libftdi support. * urJTAG built with libftdi support.
* BSDL model files for Xilinx CoolRunner-II XC264A, available at xilinx.com,
in the "Device Models" Support Resources section of the CoolRunner-II
Product Support & Documentation page. Only one file from the BSDL package is
required, and the "program" script below expects it to be at the relative
path "bsdl/xc2c/xc2c64.bsd".
To Program To Program
========== ==========