Let Xilinx ISE update some unimportant project file header stuff.
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@ -9,10 +9,10 @@
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<!-- along with the project source files, is sufficient to open and -->
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<!-- along with the project source files, is sufficient to open and -->
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<!-- implement in ISE Project Navigator. -->
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<!-- implement in ISE Project Navigator. -->
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<!-- -->
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<!-- -->
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<!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
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<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
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</header>
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</header>
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<version xil_pn:ise_version="14.1" xil_pn:schema_version="2"/>
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<version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
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<files>
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<files>
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<file xil_pn:name="top.vhd" xil_pn:type="FILE_VHDL">
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<file xil_pn:name="top.vhd" xil_pn:type="FILE_VHDL">
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