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swapped CPLD JTAG pins for HackRF One 20131127

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This commit is contained in:
Michael Ossmann
2013-12-09 19:06:24 -07:00
parent 3fb383fb3d
commit 355597d9e6
1 changed files with 4 additions and 5 deletions
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9
firmware/common/hackrf_core.h
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@ -79,9 +79,8 @@ extern "C"
/* CPLD JTAG interface */ /* CPLD JTAG interface */
#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */ #define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */
#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */ #define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */
//FIXME swap TDI and TMS once more recent HackRF One PCBs are built: #define SCU_PINMUX_CPLD_TMS (P6_5) /* GPIO3[ 4] */
#define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */ #define SCU_PINMUX_CPLD_TDI (P6_2) /* GPIO3[ 1] */
#define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */
/* CPLD SGPIO interface */ /* CPLD SGPIO interface */
#define SCU_PINMUX_SGPIO0 (P0_0) #define SCU_PINMUX_SGPIO0 (P0_0)
@ -287,9 +286,9 @@ extern "C"
#define PORT_CPLD_TDO (GPIO5) #define PORT_CPLD_TDO (GPIO5)
#define PIN_CPLD_TCK (GPIOPIN0) #define PIN_CPLD_TCK (GPIOPIN0)
#define PORT_CPLD_TCK (GPIO3) #define PORT_CPLD_TCK (GPIO3)
#define PIN_CPLD_TMS (GPIOPIN1) #define PIN_CPLD_TMS (GPIOPIN4)
#define PORT_CPLD_TMS (GPIO3) #define PORT_CPLD_TMS (GPIO3)
#define PIN_CPLD_TDI (GPIOPIN4) #define PIN_CPLD_TDI (GPIOPIN1)
#define PORT_CPLD_TDI (GPIO3) #define PORT_CPLD_TDI (GPIO3)
/* Read GPIO Pin */ /* Read GPIO Pin */