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CPLD: Tweak ISE tool settings for speed instead of density.

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This commit is contained in:
Jared Boone
2019-01-18 16:10:21 -08:00
parent d103c31187
commit 2f1eedcf23
2 changed files with 5 additions and 5 deletions
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2
firmware/cpld/sgpio_if/Makefile
View File

@ -29,7 +29,7 @@ $(DESIGN).ngd: $(DESIGN).ngc $(DESIGN).ucf
ngdbuild -intstyle ise -dd _ngo -uc $(DESIGN).ucf -p $(DEVICE)-$(DEVICE_PACKAGE)-$(DEVICE_SPEED) $(DESIGN).ngc $(DESIGN).ngd
$(DESIGN).vm6: $(DESIGN).ngd
cpldfit -intstyle ise -p $(DEVICE)-$(DEVICE_SPEED)-$(DEVICE_PACKAGE) -ofmt vhdl -optimize density -loc on -slew slow -init low -inputs 32 -pterms 28 -unused pullup -terminate float -iostd LVCMOS33 $(DESIGN).ngd
cpldfit -intstyle ise -p $(DEVICE)-$(DEVICE_SPEED)-$(DEVICE_PACKAGE) -ofmt vhdl -optimize speed -loc on -slew slow -init low -inputs 32 -pterms 36 -unused pullup -terminate float -iostd LVCMOS33 $(DESIGN).ngd
$(DESIGN).jed: $(DESIGN).vm6
hprep6 -s IEEE1149 -i $(DESIGN).vm6

8
firmware/cpld/sgpio_if/sgpio_if.xise
View File

@ -43,7 +43,7 @@
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Input Limit (4-40)" xil_pn:value="32" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Pterm Limit (3-56)" xil_pn:value="28" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Pterm Limit (3-56)" xil_pn:value="36" xil_pn:valueState="default"/>
<property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
@ -82,7 +82,7 @@
<property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
<property xil_pn:name="I/O Voltage Standard" xil_pn:value="LVCMOS33" xil_pn:valueState="non-default"/>
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Template" xil_pn:value="Optimize Density" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Template" xil_pn:value="Optimize Speed" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top" xil_pn:value="Architecture|top|Behavioral" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top File" xil_pn:value="top.vhd" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/top" xil_pn:valueState="non-default"/>
@ -103,7 +103,7 @@
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Logic Optimization" xil_pn:value="Density" xil_pn:valueState="default"/>
<property xil_pn:name="Logic Optimization" xil_pn:value="Speed" xil_pn:valueState="default"/>
<property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Max Fanout" xil_pn:value="100000" xil_pn:valueState="non-default"/>
@ -194,7 +194,7 @@
<property xil_pn:name="Use Custom Waveform Configuration File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Data Gate" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Direct Input for Input Registers" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Direct Input for Input Registers" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Clocks" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Output Enables" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Set/Reset" xil_pn:value="true" xil_pn:valueState="default"/>