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Merge pull request #121 from jboone/cleanup_201408

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Miscellaneous clean-up
This commit is contained in:
Michael Ossmann
2014-08-11 21:34:51 -06:00
parent 6f2e570829 245aa1f11e
commit 19bb8bfb5f
12 changed files with 32 additions and 17 deletions
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3
firmware/blinky/blinky.c
View File

@ -33,9 +33,6 @@ int main(void)
/* enable all power supplies */
enable_1v8_power();
#ifdef HACKRF_ONE
enable_rf_power();
#endif
/* Blink LED1/2/3 on the board and Read BOOT0/1/2/3 pins. */
while (1)

2
firmware/common/fault_handler.c
View File

@ -47,7 +47,7 @@ void hard_fault_handler(void) {
volatile hard_fault_stack_t* hard_fault_stack_pt;
void hard_fault_handler_c(uint32_t* args)
__attribute__((used)) void hard_fault_handler_c(uint32_t* args)
{
/* hard_fault_stack_pt contains registers saved before the hard fault */
hard_fault_stack_pt = (hard_fault_stack_t*)args;

18
firmware/common/hackrf_core.c
View File

@ -261,6 +261,9 @@ void cpu_clock_init(void)
/* use IRC as clock source for APB1 (including I2C0) */
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_IRC);
/* use IRC as clock source for APB3 */
CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_IRC);
i2c0_init(15);
si5351c_disable_all_outputs();
@ -365,6 +368,10 @@ void cpu_clock_init(void)
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK(1)
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_XTAL);
/* use XTAL_OSC as clock source for APB3 */
CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK(1)
| CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_XTAL);
cpu_clock_pll1_low_speed();
/* use PLL1 as clock source for BASE_M4_CLK (CPU) */
@ -400,6 +407,10 @@ void cpu_clock_init(void)
/* Switch APB1 clock over to use PLL1 (204MHz) */
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK(1)
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
/* Switch APB3 clock over to use PLL1 (204MHz) */
CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK(1)
| CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1);
}
@ -578,14 +589,11 @@ void pin_setup(void) {
scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_NOPULL);
scu_pinmux(SCU_PINMUX_BOOT0, SCU_GPIO_FAST);
scu_pinmux(SCU_PINMUX_BOOT1, SCU_GPIO_FAST);
scu_pinmux(SCU_PINMUX_BOOT2, SCU_GPIO_FAST);
scu_pinmux(SCU_PINMUX_BOOT3, SCU_GPIO_FAST);
/* Configure USB indicators */
#if (defined JELLYBEAN || defined JAWBREAKER)
scu_pinmux(SCU_PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
scu_pinmux(SCU_PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
#endif
/* Configure all GPIO as Input (safe state) */
GPIO0_DIR = 0;

2
firmware/common/hackrf_core.h
View File

@ -67,8 +67,10 @@ extern "C"
#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
/* USB peripheral */
#if (defined JELLYBEAN || defined JAWBREAKER)
#define SCU_PINMUX_USB_LED0 (P6_8)
#define SCU_PINMUX_USB_LED1 (P6_7)
#endif
/* SSP1 Peripheral PinMux */
#define SCU_SSP1_MISO (P1_3) /* P1_3 */

2
firmware/common/tuning.c
View File

@ -114,7 +114,7 @@ bool set_freq_explicit(const uint64_t if_freq_hz, const uint64_t lo_freq_hz,
}
if ((path != RF_PATH_FILTER_BYPASS) &&
(lo_freq_hz < MIN_LO_FREQ_HZ) || (lo_freq_hz > MAX_LO_FREQ_HZ)) {
((lo_freq_hz < MIN_LO_FREQ_HZ) || (lo_freq_hz > MAX_LO_FREQ_HZ))) {
return false;
}

5
firmware/mixertx/mixertx.c
View File

@ -33,7 +33,10 @@ int main(void)
const uint32_t freq = 2441000000U;
pin_setup();
gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */
enable_1v8_power();
#ifdef HACKRF_ONE
enable_rf_power();
#endif
cpu_clock_init();
ssp1_init();

3
firmware/sgpio-rx/sgpio-rx.c
View File

@ -92,6 +92,9 @@ int main(void) {
pin_setup();
enable_1v8_power();
#ifdef HACKRF_ONE
enable_rf_power();
#endif
cpu_clock_init();
ssp1_init();
rf_path_init();

5
firmware/simpletx/simpletx.c
View File

@ -32,7 +32,10 @@ int main(void)
const uint32_t freq = 2441000000U;
pin_setup();
gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */
enable_1v8_power();
#ifdef HACKRF_ONE
enable_rf_power();
#endif
cpu_clock_init();
ssp1_init();

3
firmware/spiflash/spiflash.c
View File

@ -32,8 +32,7 @@ int main(void)
pin_setup();
/* Set 1V8 */
gpio_set(PORT_EN1V8, PIN_EN1V8);
enable_1v8_power();
cpu_clock_init();

2
firmware/startup/startup.c
View File

@ -31,7 +31,7 @@ int main(void)
pin_setup();
gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */
enable_1v8_power();
cpu_clock_init();

2
firmware/startup_systick/startup_systick.c
View File

@ -131,7 +131,7 @@ int main(void)
{
pin_setup();
gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */
enable_1v8_power();
cpu_clock_init();

2
firmware/startup_systick_perfo/startup_systick.c
View File

@ -144,7 +144,7 @@ int main(void)
{
pin_setup();
gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */
enable_1v8_power();
cpu_clock_init();