This commit is contained in:
Jared Boone
2012-10-16 20:33:50 -07:00
2 changed files with 4454 additions and 4410 deletions

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@ -27,20 +27,20 @@ Schematic and layout files were designed in KiCad, an open source electronic
design automation package.
order of copper layers:
Front
Inner3
Inner2
Back
Copper 1: Front
Copper 2: Inner3
Copper 3: Inner2
Copper 4: Back
PCB description: 4 layer PCB 1.6 mm
Copper 1 35 um
Dielectric 1-2 0.35 mm
Copper 2 18 um
Dielectric 2-3 0.76 mm
Copper 3 18 um
Dielectric 3-4 0.35 mm
Copper 4 35 um
DE104iML or equivalent substrate (Er=4.42@2.4GHz TanD=0.016)
PCB description: 4 layer PCB 0.062 in
Copper 1 0.5 oz foil plated to approximately 0.0017 in
Dielectric 1-2 0.0119 in
Copper 2 1 oz foil (0.0014 in)
Dielectric 2-3 0.0280 in
Copper 3 1 oz foil (0.0014 in)
Dielectric 3-4 0.0119 in
Copper 4 0.5 oz foil plated to approximately 0.0017 in
FR4 or similar substrate with Er=4.5 (+/- 0.1)
double side solder mask black
double side silkscreen white
6 mil min trace width and

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