384 lines
13 KiB
C
384 lines
13 KiB
C
/*
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* Copyright 2012 Michael Ossmann <mike@ossmann.com>
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* Copyright 2012 Benjamin Vernoux <titanmkd@gmail.com>
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* Copyright 2012 Jared Boone <jared@sharebrained.com>
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __HACKRF_CORE_H
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#define __HACKRF_CORE_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "max2837_drv.h"
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#include "rffc5071_drv.h"
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/* hardware identification number */
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#define BOARD_ID_JELLYBEAN 0
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#define BOARD_ID_JAWBREAKER 1
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#define BOARD_ID_HACKRF_ONE 2
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#ifdef JELLYBEAN
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#define BOARD_ID BOARD_ID_JELLYBEAN
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#endif
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#ifdef JAWBREAKER
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#define BOARD_ID BOARD_ID_JAWBREAKER
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#endif
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#ifdef HACKRF_ONE
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#define BOARD_ID BOARD_ID_HACKRF_ONE
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#endif
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/*
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* SCU PinMux
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*/
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/* GPIO Output PinMux */
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#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */
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#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */
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#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */
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#define SCU_PINMUX_EN1V8 (P6_10) /* GPIO3[6] on P6_10 */
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/* GPIO Input PinMux */
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#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */
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#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */
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#define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */
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#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
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/* USB peripheral */
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#if (defined JELLYBEAN || defined JAWBREAKER)
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#define SCU_PINMUX_USB_LED0 (P6_8)
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#define SCU_PINMUX_USB_LED1 (P6_7)
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#endif
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/* SSP1 Peripheral PinMux */
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#define SCU_SSP1_MISO (P1_3) /* P1_3 */
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#define SCU_SSP1_MOSI (P1_4) /* P1_4 */
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#define SCU_SSP1_SCK (P1_19) /* P1_19 */
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#define SCU_SSP1_SSEL (P1_20) /* P1_20 */
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/* CPLD JTAG interface */
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#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */
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#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */
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#ifdef HACKRF_ONE
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#define SCU_PINMUX_CPLD_TMS (P6_5) /* GPIO3[ 4] */
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#define SCU_PINMUX_CPLD_TDI (P6_2) /* GPIO3[ 1] */
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#else
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#define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */
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#define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */
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#endif
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/* CPLD SGPIO interface */
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#define SCU_PINMUX_SGPIO0 (P0_0)
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#define SCU_PINMUX_SGPIO1 (P0_1)
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#define SCU_PINMUX_SGPIO2 (P1_15)
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#define SCU_PINMUX_SGPIO3 (P1_16)
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#define SCU_PINMUX_SGPIO4 (P6_3)
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#define SCU_PINMUX_SGPIO5 (P6_6)
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#define SCU_PINMUX_SGPIO6 (P2_2)
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#define SCU_PINMUX_SGPIO7 (P1_0)
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#ifdef JELLYBEAN
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#define SCU_PINMUX_SGPIO8 (P1_12)
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#define SCU_PINMUX_SGPIO8 (P9_6)
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#endif
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#define SCU_PINMUX_SGPIO9 (P4_3)
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#define SCU_PINMUX_SGPIO10 (P1_14)
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#define SCU_PINMUX_SGPIO11 (P1_17)
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#define SCU_PINMUX_SGPIO12 (P1_18)
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#define SCU_PINMUX_SGPIO13 (P4_8)
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#define SCU_PINMUX_SGPIO14 (P4_9)
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#define SCU_PINMUX_SGPIO15 (P4_10)
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/* MAX2837 GPIO (XCVR_CTL) PinMux */
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#ifdef JELLYBEAN
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#define SCU_XCVR_RXHP (P4_0) /* GPIO2[0] on P4_0 */
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#define SCU_XCVR_B1 (P5_0) /* GPIO2[9] on P5_0 */
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#define SCU_XCVR_B2 (P5_1) /* GPIO2[10] on P5_1 */
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#define SCU_XCVR_B3 (P5_2) /* GPIO2[11] on P5_2 */
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#define SCU_XCVR_B4 (P5_3) /* GPIO2[12] on P5_3 */
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#define SCU_XCVR_B5 (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_XCVR_B6 (P5_5) /* GPIO2[14] on P5_5 */
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#define SCU_XCVR_B7 (P5_6) /* GPIO2[15] on P5_6 */
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#endif
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#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */
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#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */
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#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */
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#define SCU_XCVR_CS (P1_20) /* GPIO0[15] on P1_20 */
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/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
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#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */
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/* RFFC5071 GPIO serial interface PinMux */
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#ifdef JELLYBEAN
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#define SCU_MIXER_ENX (P7_0) /* GPIO3[8] on P7_0 */
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#define SCU_MIXER_SCLK (P7_1) /* GPIO3[9] on P7_1 */
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#define SCU_MIXER_SDATA (P7_2) /* GPIO3[10] on P7_2 */
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#define SCU_MIXER_RESETX (P7_3) /* GPIO3[11] on P7_3 */
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#define SCU_MIXER_ENX (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_MIXER_SCLK (P2_6) /* GPIO5[6] on P2_6 */
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#define SCU_MIXER_SDATA (P6_4) /* GPIO3[3] on P6_4 */
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#define SCU_MIXER_RESETX (P5_5) /* GPIO2[14] on P5_5 */
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#endif
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/* RF LDO control */
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#ifdef JAWBREAKER
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#define SCU_RF_LDO_ENABLE (P5_0) /* GPIO2[9] on P5_0 */
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#endif
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/* RF supply (VAA) control */
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#ifdef HACKRF_ONE
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#define SCU_NO_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */
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#endif
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/* SPI flash */
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#define SCU_SSP0_MISO (P3_6)
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#define SCU_SSP0_MOSI (P3_7)
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#define SCU_SSP0_SCK (P3_3)
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#define SCU_SSP0_SSEL (P3_8) /* GPIO5[11] on P3_8 */
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#define SCU_FLASH_HOLD (P3_4) /* GPIO1[14] on P3_4 */
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#define SCU_FLASH_WP (P3_5) /* GPIO1[15] on P3_5 */
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/* RF switch control */
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#ifdef HACKRF_ONE
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#define SCU_HP (P4_0) /* GPIO2[0] on P4_0 */
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#define SCU_LP (P5_1) /* GPIO2[10] on P5_1 */
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#define SCU_TX_MIX_BP (P5_2) /* GPIO2[11] on P5_2 */
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#define SCU_NO_MIX_BYPASS (P1_7) /* GPIO1[0] on P1_7 */
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#define SCU_RX_MIX_BP (P5_3) /* GPIO2[12] on P5_3 */
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#define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */
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#define SCU_TX (P6_7) /* GPIO5[15] on P6_7 */
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#define SCU_MIX_BYPASS (P6_8) /* GPIO5[16] on P6_8 */
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#define SCU_RX (P2_5) /* GPIO5[5] on P2_5 */
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#define SCU_NO_TX_AMP_PWR (P6_9) /* GPIO3[5] on P6_9 */
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#define SCU_AMP_BYPASS (P2_10) /* GPIO0[14] on P2_10 */
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#define SCU_RX_AMP (P2_11) /* GPIO1[11] on P2_11 */
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#define SCU_NO_RX_AMP_PWR (P2_12) /* GPIO1[12] on P2_12 */
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#endif
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/* TODO add other Pins */
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#define SCU_PINMUX_GPIO3_8 (P7_0) /* GPIO3[8] */
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#define SCU_PINMUX_GPIO3_9 (P7_1) /* GPIO3[9] */
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#define SCU_PINMUX_GPIO3_10 (P7_2) /* GPIO3[10] */
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#define SCU_PINMUX_GPIO3_11 (P7_3) /* GPIO3[11] */
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#define SCU_PINMUX_GPIO3_12 (P7_4) /* GPIO3[12] */
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#define SCU_PINMUX_GPIO3_13 (P7_5) /* GPIO3[13] */
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#define SCU_PINMUX_GPIO3_14 (P7_6) /* GPIO3[14] */
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#define SCU_PINMUX_GPIO3_15 (P7_7) /* GPIO3[15] */
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#define SCU_PINMUX_SD_POW (P1_5) /* GPIO1[8] */
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#define SCU_PINMUX_SD_CMD (P1_6) /* GPIO1[9] */
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#define SCU_PINMUX_SD_VOLT0 (P1_8) /* GPIO1[1] */
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#define SCU_PINMUX_SD_DAT0 (P1_9) /* GPIO1[2] */
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#define SCU_PINMUX_SD_DAT1 (P1_10) /* GPIO1[3] */
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#define SCU_PINMUX_SD_DAT2 (P1_11) /* GPIO1[4] */
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#define SCU_PINMUX_SD_DAT3 (P1_12) /* GPIO1[5] */
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#define SCU_PINMUX_SD_CD (P1_13) /* GPIO1[6] */
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#define SCU_PINMUX_U0_TXD (P2_0) /* GPIO5[0] */
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#define SCU_PINMUX_U0_RXD (P2_1) /* GPIO5[1] */
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#define SCU_PINMUX_ISP (P2_7) /* GPIO0[7] */
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#define SCU_PINMUX_GP_CLKIN (P4_7)
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/*
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* GPIO Pins
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*/
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/* GPIO Output */
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#define PIN_LED1 (BIT1) /* GPIO2[1] on P4_1 */
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#define PIN_LED2 (BIT2) /* GPIO2[2] on P4_2 */
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#define PIN_LED3 (BIT8) /* GPIO2[8] on P6_12 */
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#define PORT_LED1_3 (GPIO2) /* PORT for LED1, 2 & 3 */
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#define PIN_EN1V8 (BIT6) /* GPIO3[6] on P6_10 */
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#define PORT_EN1V8 (GPIO3)
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#define PIN_XCVR_CS (BIT15) /* GPIO0[15] on P1_20 */
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#define PORT_XCVR_CS (GPIO0) /* PORT for CS */
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#define PIN_XCVR_ENABLE (BIT6) /* GPIO2[6] on P4_6 */
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#define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */
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#define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */
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#define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */
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#ifdef JELLYBEAN
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#define PIN_XCVR_RXHP (BIT0) /* GPIO2[0] on P4_0 */
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#define PORT_XCVR_RXHP (GPIO2)
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#define PIN_XCVR_B1 (BIT9) /* GPIO2[9] on P5_0 */
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#define PIN_XCVR_B2 (BIT10) /* GPIO2[10] on P5_1 */
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#define PIN_XCVR_B3 (BIT11) /* GPIO2[11] on P5_2 */
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#define PIN_XCVR_B4 (BIT12) /* GPIO2[12] on P5_3 */
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#define PIN_XCVR_B5 (BIT13) /* GPIO2[13] on P5_4 */
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#define PIN_XCVR_B6 (BIT14) /* GPIO2[14] on P5_5 */
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#define PIN_XCVR_B7 (BIT15) /* GPIO2[15] on P5_6 */
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#define PORT_XCVR_B (GPIO2)
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#endif
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#define PIN_AD_CS (BIT7) /* GPIO2[7] on P5_7 */
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#define PORT_AD_CS (GPIO2) /* PORT for AD_CS */
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#ifdef JELLYBEAN
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#define PIN_MIXER_ENX (BIT8) /* GPIO3[8] on P7_0 */
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#define PORT_MIXER_ENX (GPIO3)
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#define PIN_MIXER_SCLK (BIT9) /* GPIO3[9] on P7_1 */
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#define PORT_MIXER_SCLK (GPIO3)
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#define PIN_MIXER_SDATA (BIT10) /* GPIO3[10] on P7_2 */
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#define PORT_MIXER_SDATA (GPIO3)
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#define PIN_MIXER_RESETX (BIT11) /* GPIO3[11] on P7_3 */
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#define PORT_MIXER_RESETX (GPIO3)
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#define PIN_MIXER_ENX (BIT13) /* GPIO2[13] on P5_4 */
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#define PORT_MIXER_ENX (GPIO2)
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#define PIN_MIXER_SCLK (BIT6) /* GPIO5[6] on P2_6 */
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#define PORT_MIXER_SCLK (GPIO5)
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#define PIN_MIXER_SDATA (BIT3) /* GPIO3[3] on P6_4 */
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#define PORT_MIXER_SDATA (GPIO3)
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#define PIN_MIXER_RESETX (BIT14) /* GPIO2[14] on P5_5 */
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#define PORT_MIXER_RESETX (GPIO2)
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#endif
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#ifdef JAWBREAKER
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#define PIN_RF_LDO_ENABLE (BIT9) /* GPIO2[9] on P5_0 */
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#define PORT_RF_LDO_ENABLE (GPIO2) /* PORT for RF_LDO_ENABLE */
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#endif
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#ifdef HACKRF_ONE
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#define PIN_NO_VAA_ENABLE (BIT9) /* GPIO2[9] on P5_0 */
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#define PORT_NO_VAA_ENABLE (GPIO2) /* PORT for NO_VAA_ENABLE */
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#endif
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#define PIN_FLASH_HOLD (BIT14) /* GPIO1[14] on P3_4 */
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#define PIN_FLASH_WP (BIT15) /* GPIO1[15] on P3_5 */
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#define PORT_FLASH (GPIO1)
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#define PIN_SSP0_SSEL (BIT11) /* GPIO5[11] on P3_8 */
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#define PORT_SSP0_SSEL (GPIO5)
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/* RF switch control */
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#ifdef HACKRF_ONE
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#define PIN_HP (GPIOPIN0) /* GPIO2[0] on P4_0 */
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#define PORT_HP (GPIO2)
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#define PIN_LP (GPIOPIN10) /* GPIO2[10] on P5_1 */
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#define PORT_LP (GPIO2)
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#define PIN_TX_MIX_BP (GPIOPIN11) /* GPIO2[11] on P5_2 */
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#define PORT_TX_MIX_BP (GPIO2)
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#define PIN_NO_MIX_BYPASS (GPIOPIN0) /* GPIO1[0] on P1_7 */
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#define PORT_NO_MIX_BYPASS (GPIO1)
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#define PIN_RX_MIX_BP (GPIOPIN12) /* GPIO2[12] on P5_3 */
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#define PORT_RX_MIX_BP (GPIO2)
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#define PIN_TX_AMP (GPIOPIN15) /* GPIO2[15] on P5_6 */
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#define PORT_TX_AMP (GPIO2)
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#define PIN_TX (GPIOPIN15) /* GPIO5[15] on P6_7 */
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#define PORT_TX (GPIO5)
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#define PIN_MIX_BYPASS (GPIOPIN16) /* GPIO5[16] on P6_8 */
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#define PORT_MIX_BYPASS (GPIO5)
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#define PIN_RX (GPIOPIN5) /* GPIO5[5] on P2_5 */
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#define PORT_RX (GPIO5)
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#define PIN_NO_TX_AMP_PWR (GPIOPIN5) /* GPIO3[5] on P6_9 */
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#define PORT_NO_TX_AMP_PWR (GPIO3)
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#define PIN_AMP_BYPASS (GPIOPIN14) /* GPIO0[14] on P2_10 */
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#define PORT_AMP_BYPASS (GPIO0)
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#define PIN_RX_AMP (GPIOPIN11) /* GPIO1[11] on P2_11 */
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#define PORT_RX_AMP (GPIO1)
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#define PIN_NO_RX_AMP_PWR (GPIOPIN12) /* GPIO1[12] on P2_12 */
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#define PORT_NO_RX_AMP_PWR (GPIO1)
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#endif
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/* GPIO Input */
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#define PIN_BOOT0 (BIT8) /* GPIO0[8] on P1_1 */
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#define PIN_BOOT1 (BIT9) /* GPIO0[9] on P1_2 */
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#define PIN_BOOT2 (BIT7) /* GPIO5[7] on P2_8 */
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#define PIN_BOOT3 (BIT10) /* GPIO1[10] on P2_9 */
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/* CPLD JTAG interface GPIO pins */
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#define PIN_CPLD_TDO (GPIOPIN18)
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#define PORT_CPLD_TDO (GPIO5)
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#define PIN_CPLD_TCK (GPIOPIN0)
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#define PORT_CPLD_TCK (GPIO3)
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#ifdef HACKRF_ONE
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#define PIN_CPLD_TMS (GPIOPIN4)
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#define PORT_CPLD_TMS (GPIO3)
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#define PIN_CPLD_TDI (GPIOPIN1)
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#define PORT_CPLD_TDI (GPIO3)
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#else
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#define PIN_CPLD_TMS (GPIOPIN1)
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#define PORT_CPLD_TMS (GPIO3)
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#define PIN_CPLD_TDI (GPIOPIN4)
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#define PORT_CPLD_TDI (GPIO3)
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#endif
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/* Read GPIO Pin */
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#define GPIO_STATE(port, pin) ((GPIO_PIN(port) & (pin)) == (pin))
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#define BOOT0_STATE GPIO_STATE(GPIO0, PIN_BOOT0)
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#define BOOT1_STATE GPIO_STATE(GPIO0, PIN_BOOT1)
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#define BOOT2_STATE GPIO_STATE(GPIO5, PIN_BOOT2)
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#define BOOT3_STATE GPIO_STATE(GPIO1, PIN_BOOT3)
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#define MIXER_SDATA_STATE GPIO_STATE(PORT_MIXER_SDATA, PIN_MIXER_SDATA)
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#define CPLD_TDO_STATE GPIO_STATE(PORT_CPLD_TDO, PIN_CPLD_TDO)
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/* TODO add other Pins */
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typedef enum {
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TRANSCEIVER_MODE_OFF = 0,
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TRANSCEIVER_MODE_RX = 1,
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TRANSCEIVER_MODE_TX = 2
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} transceiver_mode_t;
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void delay(uint32_t duration);
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extern max2837_driver_t max2837;
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extern rffc5071_driver_t rffc5072;
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void cpu_clock_init(void);
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void cpu_clock_pll1_low_speed(void);
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void cpu_clock_pll1_max_speed(void);
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void ssp1_init(void);
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void ssp1_set_mode_max2837(void);
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void ssp1_set_mode_max5864(void);
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void pin_setup(void);
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void enable_1v8_power(void);
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void disable_1v8_power(void);
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bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom);
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bool sample_rate_set(const uint32_t sampling_rate_hz);
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bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz);
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#ifdef HACKRF_ONE
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void enable_rf_power(void);
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void disable_rf_power(void);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HACKRF_CORE_H */
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