c19f85ef24
During r9 hardware development it was thought that the MAX2839 would use a different GPIO pin for chip select, but it ended up being the same pin as is used for MAX2837 on other hardware revisions. This takes the MAX283x abstraction a bit further and fixes a bug with hackrf_debug -m.
324 lines
11 KiB
C
324 lines
11 KiB
C
/*
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* Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
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* Copyright 2012 Benjamin Vernoux <titanmkd@gmail.com>
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* Copyright 2012 Jared Boone <jared@sharebrained.com>
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __HACKRF_CORE_H
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#define __HACKRF_CORE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "si5351c.h"
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#include "spi_ssp.h"
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#include "max283x.h"
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#include "max5864.h"
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#include "mixer.h"
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#include "w25q80bv.h"
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#include "sgpio.h"
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#include "rf_path.h"
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#include "cpld_jtag.h"
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/*
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* SCU PinMux
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*/
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/* GPIO Output PinMux */
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#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */
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#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */
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#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */
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#ifdef RAD1O
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#define SCU_PINMUX_LED4 (PB_6) /* GPIO5[26] on PB_6 */
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#endif
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#define SCU_PINMUX_EN1V8 (P6_10) /* GPIO3[6] on P6_10 */
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/* GPIO Input PinMux */
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#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */
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#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */
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#ifndef HACKRF_ONE
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#define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */
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#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
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#endif
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#define SCU_PINMUX_PP_LCD_TE (P2_3) /* GPIO5[3] on P2_3 */
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#define SCU_PINMUX_PP_LCD_RDX (P2_4) /* GPIO5[4] on P2_4 */
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#define SCU_PINMUX_PP_UNUSED (P2_8) /* GPIO5[7] on P2_8 */
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#define SCU_PINMUX_PP_LCD_WRX (P2_9) /* GPIO1[10] on P2_9 */
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#define SCU_PINMUX_PP_DIR (P2_13) /* GPIO1[13] on P2_13 */
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/* USB peripheral */
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#ifdef JAWBREAKER
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#define SCU_PINMUX_USB_LED0 (P6_8)
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#define SCU_PINMUX_USB_LED1 (P6_7)
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#endif
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/* SSP1 Peripheral PinMux */
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#define SCU_SSP1_CIPO (P1_3) /* P1_3 */
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#define SCU_SSP1_COPI (P1_4) /* P1_4 */
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#define SCU_SSP1_SCK (P1_19) /* P1_19 */
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#define SCU_SSP1_CS (P1_20) /* P1_20 */
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/* CPLD JTAG interface */
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#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */
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#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */
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#if (defined HACKRF_ONE || defined RAD1O)
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#define SCU_PINMUX_CPLD_TMS (P6_5) /* GPIO3[ 4] */
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#define SCU_PINMUX_CPLD_TDI (P6_2) /* GPIO3[ 1] */
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#else
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#define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */
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#define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */
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#endif
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/* CPLD SGPIO interface */
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#define SCU_PINMUX_SGPIO0 (P0_0)
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#define SCU_PINMUX_SGPIO1 (P0_1)
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#define SCU_PINMUX_SGPIO2 (P1_15)
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#define SCU_PINMUX_SGPIO3 (P1_16)
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#define SCU_PINMUX_SGPIO4 (P6_3)
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#define SCU_PINMUX_SGPIO5 (P6_6)
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#define SCU_PINMUX_SGPIO6 (P2_2)
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#define SCU_PINMUX_SGPIO7 (P1_0)
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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#define SCU_PINMUX_SGPIO8 (P9_6)
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#endif
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#define SCU_PINMUX_SGPIO9 (P4_3)
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#define SCU_PINMUX_SGPIO10 (P1_14)
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#define SCU_PINMUX_SGPIO11 (P1_17)
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#define SCU_PINMUX_SGPIO12 (P1_18)
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#define SCU_PINMUX_SGPIO14 (P4_9)
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#define SCU_PINMUX_SGPIO15 (P4_10)
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#define SCU_HW_SYNC_EN (P4_8) /* GPIO5[12] on P4_8 */
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/* MAX2837 GPIO (XCVR_CTL) PinMux */
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#ifdef RAD1O
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#define SCU_XCVR_RXHP (P8_1) /* GPIO[] on P8_1 */
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#define SCU_XCVR_B6 (P8_2) /* GPIO[] on P8_2 */
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#define SCU_XCVR_B7 (P9_3) /* GPIO[] on P8_3 */
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#endif
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#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */
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#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */
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#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */
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#define SCU_XCVR_CS (P1_20) /* GPIO0[15] on P1_20 */
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/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
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#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */
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/* RFFC5071 GPIO serial interface PinMux */
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#define SCU_MIXER_ENX (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_MIXER_SCLK (P2_6) /* GPIO5[6] on P2_6 */
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#define SCU_MIXER_SDATA (P6_4) /* GPIO3[3] on P6_4 */
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#define SCU_MIXER_RESETX (P5_5) /* GPIO2[14] on P5_5 */
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#endif
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#ifdef RAD1O
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#define SCU_VCO_CE (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_VCO_SCLK (P2_6) /* GPIO5[6] on P2_6 */
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#define SCU_VCO_SDATA (P6_4) /* GPIO3[3] on P6_4 */
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#define SCU_VCO_LE (P5_5) /* GPIO2[14] on P5_5 */
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#define SCU_VCO_MUX (PB_5) /* GPIO5[25] on PB_5 */
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#define SCU_MIXER_EN (P6_8) /* GPIO5[16] on P6_8 */
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#define SCU_SYNT_RFOUT_EN (P6_9) /* GPIO3[5] on P6_9 */
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#endif
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/* RF LDO control */
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#ifdef JAWBREAKER
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#define SCU_RF_LDO_ENABLE (P5_0) /* GPIO2[9] on P5_0 */
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#endif
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/* RF supply (VAA) control */
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#ifdef HACKRF_ONE
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#define SCU_NO_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */
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#endif
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#ifdef RAD1O
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#define SCU_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */
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#endif
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/* SPI flash */
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#define SCU_SSP0_CIPO (P3_6)
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#define SCU_SSP0_COPI (P3_7)
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#define SCU_SSP0_SCK (P3_3)
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#define SCU_SSP0_CS (P3_8) /* GPIO5[11] on P3_8 */
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#define SCU_FLASH_HOLD (P3_4) /* GPIO1[14] on P3_4 */
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#define SCU_FLASH_WP (P3_5) /* GPIO1[15] on P3_5 */
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/* RF switch control */
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#ifdef HACKRF_ONE
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#define SCU_HP (P4_0) /* GPIO2[0] on P4_0 */
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#define SCU_LP (P5_1) /* GPIO2[10] on P5_1 */
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#define SCU_TX_MIX_BP (P5_2) /* GPIO2[11] on P5_2 */
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#define SCU_NO_MIX_BYPASS (P1_7) /* GPIO1[0] on P1_7 */
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#define SCU_RX_MIX_BP (P5_3) /* GPIO2[12] on P5_3 */
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#define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */
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#define SCU_TX (P6_7) /* GPIO5[15] on P6_7 */
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#define SCU_MIX_BYPASS (P6_8) /* GPIO5[16] on P6_8 */
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#define SCU_RX (P2_5) /* GPIO5[5] on P2_5 */
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#define SCU_NO_TX_AMP_PWR (P6_9) /* GPIO3[5] on P6_9 */
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#define SCU_AMP_BYPASS (P2_10) /* GPIO0[14] on P2_10 */
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#define SCU_RX_AMP (P2_11) /* GPIO1[11] on P2_11 */
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#define SCU_NO_RX_AMP_PWR (P2_12) /* GPIO1[12] on P2_12 */
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#endif
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#ifdef RAD1O
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#define SCU_BY_AMP (P1_7) /* GPIO1[0] on P1_7 */
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#define SCU_BY_AMP_N (P2_5) /* GPIO5[5] on P2_5 */
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#define SCU_TX_RX (P2_10) /* GPIO0[14] on P2_10 */
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#define SCU_TX_RX_N (P2_11) /* GPIO1[11] on P2_11 */
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#define SCU_BY_MIX (P2_12) /* GPIO1[12] on P2_12 */
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#define SCU_BY_MIX_N (P5_1) /* GPIO2[10] on P5_1 */
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#define SCU_LOW_HIGH_FILT (P5_2) /* GPIO2[11] on P5_2 */
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#define SCU_LOW_HIGH_FILT_N (P5_3) /* GPIO2[12] on P5_3 */
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#define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */
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#define SCU_RX_LNA (P6_7) /* GPIO5[15] on P6_7 */
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#endif
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#define SCU_PINMUX_PP_D0 (P7_0) /* GPIO3[8] */
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#define SCU_PINMUX_PP_D1 (P7_1) /* GPIO3[9] */
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#define SCU_PINMUX_PP_D2 (P7_2) /* GPIO3[10] */
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#define SCU_PINMUX_PP_D3 (P7_3) /* GPIO3[11] */
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#define SCU_PINMUX_PP_D4 (P7_4) /* GPIO3[12] */
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#define SCU_PINMUX_PP_D5 (P7_5) /* GPIO3[13] */
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#define SCU_PINMUX_PP_D6 (P7_6) /* GPIO3[14] */
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#define SCU_PINMUX_PP_D7 (P7_7) /* GPIO3[15] */
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/* TODO add other Pins */
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#define SCU_PINMUX_GPIO3_8 (P7_0) /* GPIO3[8] */
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#define SCU_PINMUX_GPIO3_9 (P7_1) /* GPIO3[9] */
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#define SCU_PINMUX_GPIO3_10 (P7_2) /* GPIO3[10] */
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#define SCU_PINMUX_GPIO3_11 (P7_3) /* GPIO3[11] */
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#define SCU_PINMUX_GPIO3_12 (P7_4) /* GPIO3[12] */
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#define SCU_PINMUX_GPIO3_13 (P7_5) /* GPIO3[13] */
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#define SCU_PINMUX_GPIO3_14 (P7_6) /* GPIO3[14] */
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#define SCU_PINMUX_GPIO3_15 (P7_7) /* GPIO3[15] */
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#define SCU_PINMUX_PP_TDO (P1_5) /* GPIO1[8] */
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#define SCU_PINMUX_SD_POW (P1_5) /* GPIO1[8] */
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#define SCU_PINMUX_SD_CMD (P1_6) /* GPIO1[9] */
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#define SCU_PINMUX_PP_TMS (P1_8) /* GPIO1[1] */
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#define SCU_PINMUX_SD_VOLT0 (P1_8) /* GPIO1[1] */
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#define SCU_PINMUX_SD_DAT0 (P1_9) /* GPIO1[2] */
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#define SCU_PINMUX_SD_DAT1 (P1_10) /* GPIO1[3] */
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#define SCU_PINMUX_SD_DAT2 (P1_11) /* GPIO1[4] */
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#define SCU_PINMUX_SD_DAT3 (P1_12) /* GPIO1[5] */
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#define SCU_PINMUX_SD_CD (P1_13) /* GPIO1[6] */
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#define SCU_PINMUX_PP_IO_STBX (P2_0) /* GPIO5[0] */
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#define SCU_PINMUX_PP_ADDR (P2_1) /* GPIO5[1] */
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#define SCU_PINMUX_U0_TXD (P2_0) /* GPIO5[0] */
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#define SCU_PINMUX_U0_RXD (P2_1) /* GPIO5[1] */
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#define SCU_PINMUX_ISP (P2_7) /* GPIO0[7] */
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#define SCU_PINMUX_GP_CLKIN (P4_7)
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/* HackRF One r9 */
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#define SCU_H1R9_CLKIN_EN (P6_7) /* GPIO5[15] on P6_7 */
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#define SCU_H1R9_CLKOUT_EN (P1_2) /* GPIO0[9] on P1_2 (has boot pull-down) */
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#define SCU_H1R9_MCU_CLK_EN (P1_1) /* GPIO0[8] on P1_1 (has boot pull-up) */
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#define SCU_H1R9_RX (P2_7) /* GPIO0[7] on P4_4 (has boot pull-up) */
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#define SCU_H1R9_NO_ANT_PWR (P4_4) /* GPIO2[4] on P4_4 */
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#define SCU_H1R9_EN1V8 (P5_0) /* GPIO2[9] on P5_0 */
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#define SCU_H1R9_NO_VAA_EN (P6_10) /* GPIO3[6] on P6_10 */
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#define SCU_H1R9_HW_SYNC_EN (P2_5) /* GPIO5[5] on P2_5 */
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typedef enum {
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TRANSCEIVER_MODE_OFF = 0,
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TRANSCEIVER_MODE_RX = 1,
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TRANSCEIVER_MODE_TX = 2,
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TRANSCEIVER_MODE_SS = 3,
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TRANSCEIVER_MODE_CPLD_UPDATE = 4,
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TRANSCEIVER_MODE_RX_SWEEP = 5,
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} transceiver_mode_t;
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typedef enum {
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HW_SYNC_MODE_OFF = 0,
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HW_SYNC_MODE_ON = 1,
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} hw_sync_mode_t;
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typedef enum {
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CLOCK_SOURCE_HACKRF = 0,
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CLOCK_SOURCE_EXTERNAL = 1,
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CLOCK_SOURCE_PORTAPACK = 2,
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} clock_source_t;
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void delay(uint32_t duration);
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void delay_us_at_mhz(uint32_t us, uint32_t mhz);
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/* TODO: Hide these configurations */
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extern si5351c_driver_t clock_gen;
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extern const ssp_config_t ssp_config_w25q80bv;
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extern const ssp_config_t ssp_config_max283x;
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extern const ssp_config_t ssp_config_max5864;
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extern max283x_driver_t max283x;
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extern max5864_driver_t max5864;
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extern mixer_driver_t mixer;
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extern w25q80bv_driver_t spi_flash;
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extern sgpio_config_t sgpio_config;
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extern rf_path_t rf_path;
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extern jtag_t jtag_cpld;
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extern i2c_bus_t i2c0;
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void cpu_clock_init(void);
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void ssp1_set_mode_max283x(void);
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void ssp1_set_mode_max5864(void);
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void pin_setup(void);
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void enable_1v8_power(void);
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void disable_1v8_power(void);
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bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom);
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bool sample_rate_set(const uint32_t sampling_rate_hz);
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bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz);
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clock_source_t activate_best_clock_source(void);
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#if (defined HACKRF_ONE || defined RAD1O)
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void enable_rf_power(void);
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void disable_rf_power(void);
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#endif
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typedef enum {
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LED1 = 0,
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LED2 = 1,
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LED3 = 2,
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LED4 = 3,
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} led_t;
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void led_on(const led_t led);
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void led_off(const led_t led);
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void led_toggle(const led_t led);
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void set_leds(const uint8_t state);
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void hw_sync_enable(const hw_sync_mode_t hw_sync_mode);
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void halt_and_flash(const uint32_t duration);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HACKRF_CORE_H */
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