0efab1710a
Start execution in SPIFI(ROM) and at startup, code from ROM is copied to RAM and shadow pointer is modified to RAM. So at end all the code and vector table is executed from RAM.
119 lines
3.6 KiB
C
119 lines
3.6 KiB
C
/*
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* Copyright 2012 Benjamin Vernoux
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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/*
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Copyright 2010-07 By Opendous Inc. (www.MicropendousX.org)
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NVIC handler info copied from NXP User Manual UM10360
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Start-up code for LPC17xx. See TODOs for
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modification instructions.
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appear in all
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copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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#include <lpc43.h>
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#define CREG_BASE 0x40043000
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#define MMIO32(addr) (*(volatile unsigned long *)(addr))
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#define CREG_M4MEMMAP MMIO32(CREG_BASE + 0x100)
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/* Reset_Handler_ROM_to_RAM variables defined in linker script */
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extern unsigned long _text_ram; /* Correspond to start of Code in RAM */
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extern unsigned long _etext_ram; /* Correspond to end of Code in RAM */
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extern unsigned long _etext_rom; /* Correspond to end of Code in ROM */
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/* Reset_Handler variables defined in linker script */
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extern unsigned long _interrupt_vector_table;
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extern unsigned long _data;
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extern unsigned long _edata;
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extern unsigned long _etext;
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extern unsigned long _bss;
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extern unsigned long _ebss;
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extern void __libc_init_array(void);
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extern int main(void);
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/* Code to be Copied from ROM to RAM */
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void Reset_Handler_ROM_to_RAM(void)
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{
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unsigned long *src, *dest;
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// Copy the code from ROM to Real RAM
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src = &_etext_rom-(&_etext_ram-&_text_ram);
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for(dest = &_text_ram; dest < &_etext_ram; )
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{
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*dest++ = *src++;
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}
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/* Change Shadow memory to Real RAM */
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CREG_M4MEMMAP = &_text_ram;
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/* Continue Execution in RAM */
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}
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/* Reset Handler */
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void Reset_Handler(void)
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{
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unsigned long *src, *dest;
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Reset_Handler_ROM_to_RAM();
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// Copy the data segment initializers from flash to SRAM
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src = &_etext;
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for(dest = &_data; dest < &_edata; )
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{
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*dest++ = *src++;
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}
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// Initialize the .bss segment of memory to zeros
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src = &_bss;
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while (src < &_ebss)
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{
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*src++ = 0;
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}
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__libc_init_array();
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// Set the vector table location.
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SCB_VTOR = &_interrupt_vector_table;
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main();
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// In case main() fails, have something to breakpoint
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while (1) {;}
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}
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