0efab1710a
Start execution in SPIFI(ROM) and at startup, code from ROM is copied to RAM and shadow pointer is modified to RAM. So at end all the code and vector table is executed from RAM.
164 lines
4.2 KiB
Plaintext
164 lines
4.2 KiB
Plaintext
/*
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* Copyright 2010 - 2012 Michael Ossmann
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* Copyright 2012 Benjamin Vernoux
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*
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* This file is part of HackRF
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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ENTRY(_start)
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SEARCH_DIR(.)
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GROUP(libgcc.a libc.a libm.a libnosys.a)
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MEMORY
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{
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/*
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* Our code is installed in SPIFI(ROM) at 0x80000000 it is addressed through the 256M shadow area at 0x00000000 at Boot.
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* Reset_Handler call Reset_Handler_ROM_to_RAM(executed in SPIFI) and Copy the code from ROM to RAM,
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* and set shadow pointer to RAM, then the code execution continue in RAM.
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*/
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rom (rx) : ORIGIN = 0x80000000, LENGTH = 128K /* Real ROM Address It cannot exceed RAM size (Real Size is 1MB) */
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ram (rwx) : ORIGIN = 0x10000000, LENGTH = 128K /* Real RAM Address */
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shadow_ram (rwx) : ORIGIN = 0x00000000, LENGTH = 128K /* 128 Kb Real Address is 0x10000000 but remapped to Shadow 0x00000000 */
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/* there are some additional RAM regions */
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}
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/*
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* much copied from: Linker script for Cortex-M3
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*
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* Version:CodeSourcery Sourcery G++ Lite 2007q3-53
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* BugURL:https://support.codesourcery.com/GNUToolchain/
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*
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* Copyright 2007 CodeSourcery.
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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EXTERN(Reset_Handler)
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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_text_ram = . + ORIGIN(ram); /* Start of Code in RAM */
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. = ALIGN(0x400); /* Ensure that vector table is aligned as hardware requires. */
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_interrupt_vector_table = .;
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KEEP(*(.irq_handler_table))
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*(.text .text.* .gnu.linkonce.t.*)
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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*(.eh_frame_hdr)
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*(.eh_frame)
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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. = ALIGN(8);
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_etext = .;
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} > shadow_ram
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > shadow_ram
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > shadow_ram
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__exidx_end = .;
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_etext = .;
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_etext_ram = . + ORIGIN(ram);
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_etext_rom = . + ORIGIN(rom);
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.data :
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{
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_data = .;
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*(vtable)
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*(.data*)
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_edata = .;
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} > shadow_ram
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/* zero initialized data */
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.bss :
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{
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_bss = .;
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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_ebss = .;
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__bss_end__ = .;
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} > shadow_ram
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/* Where we put the heap with cr_clib */
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.cr_heap :
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{
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end = .;
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__end__ = .;
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_pvHeapStart = .;
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} > shadow_ram
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/* Leave room above stack for IAP to run */
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_StackTop = ORIGIN(ram) + (ORIGIN(shadow_ram) + LENGTH(shadow_ram) - 32);
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}
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