5363ec3672
Had to do it all at once due to name conflicts with API exposed in libopencm3. Quite invasive patch! Also precipitated an LED API...
60 lines
2.2 KiB
C
60 lines
2.2 KiB
C
/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "w25q80bv_target.h"
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#include <libopencm3/lpc43xx/scu.h>
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#include "hackrf_core.h"
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/* TODO: Why is SSEL being controlled manually when SSP0 could do it
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* automatically?
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*/
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void w25q80bv_target_init(w25q80bv_driver_t* const drv) {
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(void)drv;
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/* Init SPIFI GPIO to Normal GPIO */
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scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK
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scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14]
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scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15]
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scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_MISO IO1 => GPIO0[6]
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scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_MOSI IO0 => GPIO5[10]
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scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11]
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/* configure SSP pins */
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scu_pinmux(SCU_SSP0_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP0_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2));
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/* configure GPIO pins */
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scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
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scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
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scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
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/* drive SSEL, HOLD, and WP pins high */
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gpio_set(drv->gpio_hold);
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gpio_set(drv->gpio_wp);
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/* Set GPIO pins as outputs. */
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gpio_output(drv->gpio_hold);
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gpio_output(drv->gpio_wp);
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}
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