103 lines
3.3 KiB
C
103 lines
3.3 KiB
C
/*
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* Copyright 2013 Michael Ossmann
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* Copyright 2013 Benjamin Vernoux
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* Copyright 2014 Jared Boone, ShareBrained Technology
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "w25q80bv_spi.h"
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#include <libopencm3/lpc43xx/gpio.h>
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#include <libopencm3/lpc43xx/rgu.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/ssp.h>
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#include "hackrf_core.h"
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void w25q80bv_spi_init(spi_t* const spi) {
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(void)spi;
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const uint8_t serial_clock_rate = 2;
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const uint8_t clock_prescale_rate = 2;
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/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
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RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
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/* initialize SSP0 */
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ssp_init(SSP0_NUM,
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SSP_DATA_8BITS,
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SSP_FRAME_SPI,
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SSP_CPOL_0_CPHA_0,
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serial_clock_rate,
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clock_prescale_rate,
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SSP_MODE_NORMAL,
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SSP_MASTER,
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SSP_SLAVE_OUT_ENABLE);
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/* Init SPIFI GPIO to Normal GPIO */
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scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK
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scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14]
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scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15]
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scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_MISO IO1 => GPIO0[6]
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scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_MOSI IO0 => GPIO5[10]
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scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11]
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/* configure SSP pins */
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scu_pinmux(SCU_SSP0_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP0_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2));
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/* configure GPIO pins */
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scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
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scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
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scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
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/* drive SSEL, HOLD, and WP pins high */
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gpio_set(PORT_FLASH, (PIN_FLASH_HOLD | PIN_FLASH_WP));
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gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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/* Set GPIO pins as outputs. */
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GPIO1_DIR |= (PIN_FLASH_HOLD | PIN_FLASH_WP);
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GPIO5_DIR |= PIN_SSP0_SSEL;
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}
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void w25q80bv_spi_transfer_gather(
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spi_t* const spi,
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const spi_transfer_t* const transfers,
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const size_t transfer_count
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) {
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(void)spi;
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gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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for(size_t i=0; i<transfer_count; i++) {
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uint8_t* const p = transfers[i].data;
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for(size_t j=0; j<transfers[i].count; j++) {
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p[j] = ssp_transfer(SSP0_NUM, p[j]);
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}
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}
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gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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}
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void w25q80bv_spi_transfer(spi_t* const spi, void* const data, const size_t count) {
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const spi_transfer_t transfers[] = {
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{ data, count },
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};
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w25q80bv_spi_transfer_gather(spi, transfers, 1);
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}
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