hackrf

History

Jared Boone 3bf6573dc6 Add skip-every-N function to CPLD, where N is controlled by three input pins from the microcontroller.

Updated SGPIO CPLD testbench, as it had fallen a bit out of date.
Add SGPIO API initialization and control of CPLD decimation feature.

2013-11-19 19:52:06 -08:00

blinky

firmware/: Use uint32_t instead of u32

2013-07-07 17:48:54 -04:00

blinky_rom_to_ram

Cleanup on xxx_rom_to_ram directory now it contains only makefile, removed redundant .c file from xxx dir.

2013-04-07 18:55:12 +02:00

common

Add skip-every-N function to CPLD, where N is controlled by three input pins from the microcontroller.

2013-11-19 19:52:06 -08:00

cpld

Add skip-every-N function to CPLD, where N is controlled by three input pins from the microcontroller.

2013-11-19 19:52:06 -08:00

cpldjtagprog

sgpio_if (top.vhd) CPLD VHDL fix for IQ/aliasing problems for ADC. (cpldjtagprog => sgpio_if_xsvf.h updated to rebuild).

2013-04-04 19:43:30 +02:00

cpldjtagprog_rom_to_ram

Cleanup on xxx_rom_to_ram directory now it contains only makefile, removed redundant .c file from xxx dir.

2013-04-07 18:55:12 +02:00

hackrf_usb

Remove sample-pair reordering in SGPIO interrupt -- CPLD fixes address this.

2013-11-16 13:32:41 -08:00

libopencm3 @ 0f435b51f6

Fix to SPIFI addressing during hackrf_spiflash read operation. This fixes mismatches between programmed and read-back data.

2013-09-17 12:18:33 -07:00

mixertx

Merge branch 'master' of https://github.com/mossmann/hackrf

2012-09-04 09:24:18 -07:00

sgpio

Consolidate a few clock setup tasks that repeat among many projects into cpu_clock_init().

2012-10-17 11:45:30 -07:00

sgpio_passthrough_rom_to_ram

Fixed some makefile and set default BOARD to JAWBREAKER (instead of JELLYBEAN).

2013-02-10 18:33:01 +01:00

sgpio-rx

firmware, lib: update comments, doc

2013-06-17 12:32:12 +02:00

simpletx

Moving gpio_setup() / pin_setup() functions in separate projects to hackrf_core.h/c.

2012-07-31 21:38:57 -07:00

spiflash

induce fewer seizures

2013-02-22 18:41:46 -07:00

startup

firmware/: Use uint32_t instead of u32

2013-07-07 17:48:54 -04:00

startup_systick

firmware/: Update #includes for libopencm3 merge

2013-07-07 17:48:54 -04:00

startup_systick_perfo

firmware/: Update #includes for libopencm3 merge

2013-07-07 17:48:54 -04:00

startup_systick_perfo_rom_to_ram

Cleanup on xxx_rom_to_ram directory now it contains only makefile, removed redundant .c file from xxx dir.

2013-04-07 18:55:12 +02:00

tools

Additional CGU register decoding in dump_cgu.py.

2013-11-02 22:51:35 -07:00

.gitignore

.gitignore additions: .dfu in /firmware, .pdf and .svg in /hardware

2013-03-07 14:56:32 -07:00

Makefile

renamed usb_performance to hackrf_usb

2013-05-18 08:51:34 -06:00

README

added dfu-util requirement

2013-08-11 14:56:32 -06:00

README

The primary firmware source code for USB HackRF devices is hackrf_usb.  Most of
the other directories contain firmware source code for test and development.
The common directory contains source code shared by multiple HackRF firmware
projects.  The cpld directory contains HDL source for the CPLD present on the
Jawbreaker and Jellybean designs.

The firmware is set up for compilation with the GCC toolchain available here:

https://code.launchpad.net/gcc-arm-embedded

Required dependency:

https://github.com/mossmann/libopencm3

For loading firmware into RAM with DFU you will also need:

git://git.openezx.org/dfu-util.git