389 lines
9.6 KiB
C
389 lines
9.6 KiB
C
/*
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* Copyright 2012 Michael Ossmann
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include <stdint.h>
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#include <libopencm3/lpc43xx/ssp.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/gpio.h>
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#include "hackrf_core.h"
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#include "rffc5071.h"
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/* Set up pins for bit-banged serial interface. */
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void rffc5071_init(void)
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{
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/* Configure GPIO pins. */
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scu_pinmux(SCU_MIXER_ENX, SCU_GPIO_FAST);
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scu_pinmux(SCU_MIXER_SCLK, SCU_GPIO_FAST);
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scu_pinmux(SCU_MIXER_SDATA, SCU_GPIO_FAST);
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/* Set GPIO pins as outputs. */
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GPIO3_DIR |= (PIN_MIXER_ENX | PIN_MIXER_SCLK | PIN_MIXER_SDATA);
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/* set to known state */
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gpio_set(PORT_MIXER, PIN_MIXER_ENX); /* active low */
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gpio_clear(PORT_MIXER, (PIN_MIXER_SCLK | PIN_MIXER_SDATA));
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//FIXME hard coded setup, fields not broken out
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/* initial setup */
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rffc5071_reg_write(RFFC5071_P2_FREQ1, 0x0000);
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rffc5071_reg_write(RFFC5071_VCO_AUTO, 0xff00);
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rffc5071_reg_write(RFFC5071_CT_CAL1, 0xacbf);
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rffc5071_reg_write(RFFC5071_CT_CAL2, 0xacbf);
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rffc5071_reg_write(RFFC5071_TEST, 0x0005);
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/* set to be configured via 3-wire interface, not control pins */
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rffc5071_reg_write(RFFC5071_SDI_CTRL, 0x8000);
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//rffc5071_reg_write(MIX_CONT, 0xc800); /* full duplex */
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rffc5071_reg_write(RFFC5071_MIX_CONT, 0x4800); /* half duplex */
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/*
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* setup for 250 MHz LO:
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* n_lo = 4
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* lodiv = 16 (2^4, so set to 4)
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* fvco = 4 GHz
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* fbkdiv = 4
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* ndiv = 20
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* n = 20
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* nummsb = 0
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* numlsb = 0
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0a48);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x0000);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0x0000);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 400 MHz LO:
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* lodiv = 8 (2^3, so set to 3)
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* fvco = 3200 MHz
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* fbkdiv = 2
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* ndiv = 32
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* n = 32
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* nummsb = 0
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* numlsb = 0
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x1034);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x0000);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0x0000);
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/*
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* setup for 500 MHz LO:
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* n_lo = 3
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* lodiv = 8 (2^3, so set to 3)
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* fvco = 4 GHz
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* fbkdiv = 4
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* ndiv = 20
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* n = 20
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* nummsb = 0
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* numlsb = 0
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*/
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rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0a39);
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rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x0000);
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rffc5071_reg_write(RFFC5071_P1_FREQ3, 0x0000);
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/* charge pump set for VCO > 3.2 GHz */
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rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 513 MHz LO:
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* n_lo = 3
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* lodiv = 8 (2^3, so set to 3)
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* fvco = 4104 MHz
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* fbkdiv = 4
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* ndiv = 20.52
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* n = 20
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* nummsb = 34078 (0x851e)
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* numlsb = 184 (0xb8)
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0a38);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x851e);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0xb800);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 1 GHz LO:
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* n_lo = 2
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* lodiv = 4 (2^2, so set to 2)
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* fvco = 4 GHz
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* fbkdiv = 4
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* ndiv = 20
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* n = 20
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* nummsb = 0
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* numlsb = 0
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0a29);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x0000);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0x0000);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 1417 MHz LO:
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* n_lo = 1
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* lodiv = 2 (2^1, so set to 1)
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* fvco = 2834 MHz
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* fbkdiv = 2
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* ndiv = 28.34
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* n = 28
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* nummsb = 22282 (570a)
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* numlsb = 61 (0x3d)
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0e14);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x570a);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0x3d00);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 2 GHz LO:
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* n_lo = 1
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* lodiv = 2 (2^1, so set to 1)
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* fvco = 4 GHz
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* fbkdiv = 4
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* ndiv = 20
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* n = 20
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* nummsb = 0
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* numlsb = 0
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0a19);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x0000);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0x0000);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 2191 GHz LO:
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* n_lo = 1
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* lodiv = 2 (2^1, so set to 1)
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* fvco = 4382 MHz
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* fbkdiv = 4
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* ndiv = 21.91
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* n = 21
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* nummsb = 59637 (0xe8f5)
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* numlsb = 194 (0xc2)
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0a98);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0xe8f5);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0xc200);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 2341 GHz LO:
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* n_lo = 1
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* lodiv = 2 (2^1, so set to 1)
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* fvco = 4682 MHz
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* fbkdiv = 4
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* ndiv = 23.41
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* n = 23
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* nummsb = 26869 (0x68f5)
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* numlsb = 194 (0xc2)
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0b9a);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x68f5);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0xc200);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 2341 GHz LO:
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* n_lo = 1
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* lodiv = 2 (2^1, so set to 1)
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* fvco = 4782 MHz
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* fbkdiv = 4
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* ndiv = 23.91
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* n = 23
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* nummsb = 59637 (0xe8f5)
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* numlsb = 194 (0xc2)
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0b9a);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0xe8f5);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0xc200);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/*
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* setup for 2411 GHz LO:
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* n_lo = 1
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* lodiv = 2 (2^1, so set to 1)
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* fvco = 4822 MHz
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* fbkdiv = 4
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* ndiv = 24.11
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* n = 24
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* nummsb = 7208 (0x1c28)
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* numlsb = 245 (0xf5)
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*/
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//rffc5071_reg_write(RFFC5071_P1_FREQ1, 0x0c18);
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//rffc5071_reg_write(RFFC5071_P1_FREQ2, 0x1c28);
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//rffc5071_reg_write(RFFC5071_P1_FREQ3, 0xf500);
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/* charge pump set for VCO > 3.2 GHz */
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//rffc5071_reg_write(RFFC5071_LF, 0xbefb);
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/* enable device */
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rffc5071_reg_write(RFFC5071_SDI_CTRL, 0xc000); /* mixer 1 (TX) */
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//rffc5071_reg_write(RFFC5071_SDI_CTRL, 0xe000); /* mixer 2 (RX) */
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}
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void serial_delay(void)
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{
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uint32_t i;
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for (i = 0; i < 1000; i++)
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__asm__("nop");
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}
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/*
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* Send 25 bits:
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* first bit is ignored,
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* second bit is zero for write operation,
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* next 7 bits are register address,
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* next 16 bits are register value.
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*/
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void rffc5071_reg_write(uint8_t reg, uint16_t val)
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{
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int bits = 25;
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int msb = 1 << (bits -1);
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uint32_t data = ((reg & 0x7f) << 16) | val;
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/* make sure everything is starting in the correct state */
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gpio_set(PORT_MIXER, PIN_MIXER_ENX);
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gpio_clear(PORT_MIXER, (PIN_MIXER_SCLK | PIN_MIXER_SDATA));
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/*
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* The device requires two clocks while ENX is high before a serial
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* transaction. This is not clearly documented.
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*/
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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/* start transaction by bringing ENX low */
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gpio_clear(PORT_MIXER, PIN_MIXER_ENX);
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while (bits--) {
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if (data & msb)
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gpio_set(PORT_MIXER, PIN_MIXER_SDATA);
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else
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gpio_clear(PORT_MIXER, PIN_MIXER_SDATA);
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data <<= 1;
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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}
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_ENX);
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}
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/*
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* Send 9 bits:
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* first bit is ignored,
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* second bit is one for read operation,
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* next 7 bits are register address.
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* Then receive 16 bits (register value).
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*/
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uint16_t rffc5071_reg_read(uint8_t reg)
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{
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int bits = 9;
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int msb = 1 << (bits -1);
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uint32_t data = 0x80 | (reg & 0x7f);
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/* make sure everything is starting in the correct state */
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gpio_set(PORT_MIXER, PIN_MIXER_ENX);
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gpio_clear(PORT_MIXER, (PIN_MIXER_SCLK | PIN_MIXER_SDATA));
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/*
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* The device requires two clocks while ENX is high before a serial
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* transaction. This is not clearly documented.
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*/
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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/* start transaction by bringing ENX low */
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gpio_clear(PORT_MIXER, PIN_MIXER_ENX);
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while (bits--) {
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if (data & msb)
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gpio_set(PORT_MIXER, PIN_MIXER_SDATA);
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else
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gpio_clear(PORT_MIXER, PIN_MIXER_SDATA);
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data <<= 1;
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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}
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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bits = 16;
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data = 0;
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/* set SDATA line as input */
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GPIO3_DIR &= ~PIN_MIXER_SDATA;
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while (bits--) {
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data <<= 1;
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_SCLK);
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serial_delay();
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gpio_clear(PORT_MIXER, PIN_MIXER_SCLK);
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if (MIXER_SDATA_STATE)
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data |= 1;
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}
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/* set SDATA line as output */
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GPIO3_DIR |= PIN_MIXER_SDATA;
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serial_delay();
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gpio_set(PORT_MIXER, PIN_MIXER_ENX);
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return data;
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}
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