Jared Boone 07b6f81a6c Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.

2012-06-09 22:02:45 -07:00

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sgpio_if.svf

Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.

2012-06-09 22:02:45 -07:00

sgpio_if.xise

Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.

2012-06-09 22:02:45 -07:00

top_tb.vhd

Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.

2012-06-09 22:02:45 -07:00

top.ucf

Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.

2012-06-09 22:02:45 -07:00

top.vhd

Initial implementation of MAX5864 <-> SGPIO interface via Xilinx CoolRunner-II CPLD.

2012-06-09 22:02:45 -07:00