Michael Ossmann
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25f6e8f684
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USB DFU boot by default
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2012-10-02 15:09:06 -06:00 |
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Michael Ossmann
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fbe206cae9
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fixed LPC VBUS input so USB DFU boot works
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2012-10-02 15:05:04 -06:00 |
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Michael Ossmann
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d52b827233
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copyright/license on frontend page
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2012-09-30 11:41:16 -06:00 |
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Michael Ossmann
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9c23f65fea
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minor capacitor correction for 1V8 regulation
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2012-09-22 23:31:28 -06:00 |
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Michael Ossmann
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5b15e20493
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more paste layer improvements
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2012-09-20 15:44:20 -06:00 |
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Michael Ossmann
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bf0c1c3460
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paste layer corrections
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2012-09-20 13:33:59 -06:00 |
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Michael Ossmann
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241b9147cb
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added MIXER_SCLK and MIXER_SDATA signals to fix bug (SSP1_SCK had no GPIO function)
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2012-09-19 10:48:54 -06:00 |
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Michael Ossmann
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a8428b6208
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small HP route change for clearance
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2012-09-18 10:20:53 -06:00 |
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Michael Ossmann
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138c1f2320
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fixed board name on silkscreen
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2012-09-17 15:48:26 -06:00 |
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Michael Ossmann
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f21e6e6e5a
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reoriented some silkscreen labels for consistency
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2012-09-17 14:02:56 -06:00 |
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Michael Ossmann
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e33831989a
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bom updates based on part availability
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2012-09-17 12:58:22 -06:00 |
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Michael Ossmann
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2f3a7f2546
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boot selection table in schematic
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2012-09-14 22:26:49 -06:00 |
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Michael Ossmann
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0b09bb5a25
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noted DNP for test points
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2012-09-14 22:16:49 -06:00 |
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Michael Ossmann
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037fce4ac4
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plot options
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2012-09-14 15:25:40 -06:00 |
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Michael Ossmann
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8ced009564
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silkscreen
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2012-09-14 15:19:07 -06:00 |
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Michael Ossmann
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c46ac4b025
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clkin/clkout matching options
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2012-09-13 22:10:02 -06:00 |
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Michael Ossmann
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85d644e8a3
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serial test points
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2012-09-13 21:34:48 -06:00 |
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Michael Ossmann
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00fdaaec50
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changed crystal X2 to meet MCU specs
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2012-09-13 21:20:14 -06:00 |
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Michael Ossmann
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7b1d53e3ff
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mounting holes
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2012-09-12 13:27:06 -06:00 |
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Michael Ossmann
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14a45ea036
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ran DRC
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2012-09-07 02:20:08 -06:00 |
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Michael Ossmann
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cbe4d8d753
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misc. corrections
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2012-09-07 02:07:41 -06:00 |
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Michael Ossmann
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d8a6a4946f
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LEDs
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2012-09-07 01:51:39 -06:00 |
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Michael Ossmann
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ed614c1038
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switch control logic ICs
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2012-09-07 01:38:02 -06:00 |
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Michael Ossmann
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188988f7a2
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switch control signals
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2012-09-07 01:11:11 -06:00 |
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Michael Ossmann
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359fcdfff9
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swapped some RFFC5072 GPO signals to ease layout
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2012-09-07 00:27:36 -06:00 |
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Michael Ossmann
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8f4495cb57
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RFFC5072 control signals
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2012-09-06 23:02:35 -06:00 |
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Michael Ossmann
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b7c3f052aa
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MAX2837 control signals
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2012-09-06 21:08:06 -06:00 |
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Michael Ossmann
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1f53bbc9b2
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I2C tracks
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2012-09-06 20:31:02 -06:00 |
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Michael Ossmann
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07d93dbbe6
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resized board
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2012-09-06 20:06:23 -06:00 |
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Michael Ossmann
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3d33725546
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SPI signals
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2012-09-06 19:51:59 -06:00 |
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Michael Ossmann
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06a8da2b5c
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corrected global label mismatch
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2012-09-06 18:47:01 -06:00 |
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Michael Ossmann
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10c05e40de
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reworked supply zones
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2012-09-06 18:45:27 -06:00 |
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Michael Ossmann
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de46bdcd1a
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moved JTAG header
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2012-09-06 13:00:31 -06:00 |
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Michael Ossmann
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abbcbc56ff
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expansion headers
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2012-09-06 12:14:19 -06:00 |
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Michael Ossmann
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ff05b8e351
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supply zones
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2012-09-06 11:47:09 -06:00 |
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Michael Ossmann
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30c3ccff1a
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boot selection headers
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2012-09-06 11:21:54 -06:00 |
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Michael Ossmann
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910e5fb74d
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RF LDO layout
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2012-09-06 11:04:59 -06:00 |
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Michael Ossmann
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ff2a333cd5
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shorted 1x2 header
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2012-09-06 10:49:11 -06:00 |
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Michael Ossmann
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92c413cc6a
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switching regulator tracks
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2012-09-06 10:17:01 -06:00 |
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Michael Ossmann
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47d7438840
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test points
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2012-09-06 08:43:03 -06:00 |
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Michael Ossmann
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6506ee5699
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fixed GCK0 test point name
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2012-09-06 08:30:58 -06:00 |
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Michael Ossmann
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8a8500c9d6
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started USB, switching regulator
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2012-09-05 18:52:53 -06:00 |
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Michael Ossmann
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5b3f0f34d9
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inner zones
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2012-09-05 18:38:34 -06:00 |
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Michael Ossmann
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c1eaca7bf6
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preliminary PCB edges
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2012-09-05 18:34:25 -06:00 |
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Michael Ossmann
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ae12fa7124
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mcu xtal, spifi
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2012-09-05 18:29:19 -06:00 |
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Michael Ossmann
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a7a345a9c5
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CPLD layout
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2012-09-05 17:37:16 -06:00 |
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Michael Ossmann
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e04d3c0bbc
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spread layout to give clock generator more room, clock generator supply option resistors
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2012-09-05 16:35:50 -06:00 |
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Michael Ossmann
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40c3c95a2e
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test point for CPLD GCK0
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2012-09-05 16:12:19 -06:00 |
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Michael Ossmann
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2efaf79094
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shorted resistor modules
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2012-09-05 15:30:00 -06:00 |
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Michael Ossmann
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926da640ad
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RF LDO fixes
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2012-09-05 15:06:24 -06:00 |
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