Michael Ossmann
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b2291ba5d9
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SPI flash layout
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2013-11-06 15:32:09 -07:00 |
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Michael Ossmann
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3ed0112672
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misc. layout
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2013-11-05 17:51:18 -07:00 |
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Michael Ossmann
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a374c4191a
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CPLD JTAG header
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2013-11-05 16:45:53 -07:00 |
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Michael Ossmann
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b2a6dba955
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cleaned up Si5351C layout
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2013-11-05 16:28:29 -07:00 |
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Jared Boone
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4917c5019a
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Additional CGU register decoding in dump_cgu.py.
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2013-11-02 22:51:35 -07:00 |
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Michael Ossmann
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bef5835d54
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USB, regulator layout
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2013-11-01 18:10:49 -06:00 |
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Michael Ossmann
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4af6b1688b
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LPC4320 placed
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2013-11-01 16:53:22 -06:00 |
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Michael Ossmann
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52c7f3297b
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CPLD layout
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2013-11-01 00:03:15 -06:00 |
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Michael Ossmann
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c7d8636858
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hopeful Si5351C placement
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2013-10-31 23:04:19 -06:00 |
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Michael Ossmann
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aff2a579e3
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MAX5864 layout, rearranged analog baseband headers
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2013-10-31 22:44:55 -06:00 |
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Michael Ossmann
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17e469c979
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analog baseband headers
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2013-10-31 21:45:34 -06:00 |
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Michael Ossmann
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567417df04
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RF section front side finished
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2013-10-31 21:18:42 -06:00 |
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Michael Ossmann
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551e850550
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more RF layout
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2013-10-29 18:30:12 -06:00 |
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Michael Ossmann
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565a821e92
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RF section rough component positions
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2013-10-29 17:50:57 -06:00 |
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Michael Ossmann
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dbcb2b3550
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started RF layout
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2013-10-29 15:16:02 -06:00 |
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Michael Ossmann
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dccb8ee552
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BMI-S-230 RF shield module
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2013-10-28 18:46:37 -06:00 |
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Michael Ossmann
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60e66317d7
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new board outline
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2013-10-28 18:21:48 -06:00 |
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Michael Ossmann
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e87234b8f9
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big import of updates into pcbnew
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2013-10-28 18:00:17 -06:00 |
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Michael Ossmann
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c6bacf0e21
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module selection update to agree with recent schematic changes
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2013-10-28 17:06:49 -06:00 |
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Michael Ossmann
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bd75823536
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USB-MICROB-FCI-10103594 module: decreased drill sizes
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2013-10-28 16:28:57 -06:00 |
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Michael Ossmann
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6c7352b797
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QFN32 (RFFC5072) module: increased pad length by 50%
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2013-10-28 16:07:20 -06:00 |
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Michael Ossmann
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e87529df8b
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QFN20-4 (Si5351C) module: increased pad width a bit
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2013-10-28 15:40:59 -06:00 |
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Michael Ossmann
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62e4176953
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QFN20-4 (Si5351C) module: increased pad length by 50%
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2013-10-28 15:33:14 -06:00 |
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Michael Ossmann
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25aaa2a881
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SKY13350 module: doubled pad size
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2013-10-28 15:22:29 -06:00 |
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Michael Ossmann
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a90a57c5b9
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SKY13317 module: increased pad length by 50%
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2013-10-28 15:07:14 -06:00 |
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Michael Ossmann
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7bfd46597b
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USB0_ID pull-up
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2013-10-25 18:15:19 -06:00 |
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Michael Ossmann
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0d59261ae3
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removed RF switch logic ICs, replaced with direct GPIO
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2013-10-25 18:05:03 -06:00 |
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Michael Ossmann
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beccc70ad6
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change to LPC4320
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2013-10-25 17:17:37 -06:00 |
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Michael Ossmann
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e872bc45a9
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broke out more I2S0 pins
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2013-10-25 17:14:14 -06:00 |
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Michael Ossmann
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70a87a86aa
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added I2C1 to SSP0 header (all expansion headers are subject to rearranging during layout)
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2013-10-25 17:02:19 -06:00 |
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Michael Ossmann
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1176bfe7e8
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SSP0 header
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2013-10-25 15:55:17 -06:00 |
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Michael Ossmann
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b4e3d59ae4
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VBUS header
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2013-10-25 15:12:55 -06:00 |
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Michael Ossmann
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e279702915
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connected USB0 ID pin
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2013-10-25 14:35:09 -06:00 |
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Michael Ossmann
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3ab5e3b991
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high side switch for VAA (RF section power supply)
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2013-10-25 14:24:27 -06:00 |
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Michael Ossmann
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3b07a93eea
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RTC expansion
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2013-10-25 13:47:43 -06:00 |
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Michael Ossmann
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d5fbf35545
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fixed all clock generator output supplies to VCC
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2013-10-24 14:56:34 -06:00 |
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Michael Ossmann
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cbd3295cb3
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fixed clock input and output to 3.3V CMOS
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2013-10-24 14:42:03 -06:00 |
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Michael Ossmann
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0de2298d77
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optional RTC XTAL
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2013-09-29 21:21:50 -06:00 |
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Michael Ossmann
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40406e52ad
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removed more DNP parts
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2013-09-29 20:54:36 -06:00 |
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Michael Ossmann
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cda1462fff
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regulator feedback fix
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2013-09-29 20:47:32 -06:00 |
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Michael Ossmann
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c2ae30dd4b
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removed PCB antenna
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2013-09-29 20:42:20 -06:00 |
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Michael Ossmann
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2626e1814d
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fixed MAX5864 OVDD to VCC
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2013-09-29 19:19:03 -06:00 |
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Michael Ossmann
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a9026c521f
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fixed VCCIO1 to VCC
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2013-09-29 19:08:04 -06:00 |
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Michael Ossmann
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6212a4ef5e
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removed U3 test points (there is another UART exposed on the ISP header)
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2013-09-29 18:58:25 -06:00 |
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Michael Ossmann
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e9e6486c0c
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removed USB LEDs
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2013-09-29 18:55:54 -06:00 |
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Michael Ossmann
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dae8820357
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removed some DNP parts and 0 ohm resistors
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2013-09-29 18:55:01 -06:00 |
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Michael Ossmann
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f78bb74dd9
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removed boot headers, added reset and DFU pushbuttons
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2013-09-29 18:47:39 -06:00 |
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Michael Ossmann
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822b0e73fc
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HackRF One: started hardware design by copying Jawbreaker
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2013-09-29 18:33:34 -06:00 |
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Jared Boone
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06da7fd83a
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Reduce drive strength from clock generator (Si5351C) to first mixer (RFFC5072). This reduces every-50MHz spurs in RX by 10 to 15dB.
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2013-09-22 11:54:37 -07:00 |
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Jared Boone
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314b3cdc7b
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Don't put MAX2837 into shutdown mode -- powering up takes a bit too long (500us for PLL to stabilize). Will need to revisit, because the MAX2837 chews up significant current (35 to 45mA) when not in shutdown.
Remove excess calls to max2837_start() and max2837_stop().
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2013-09-22 11:52:45 -07:00 |
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