Michael Ossmann
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60662de1c3
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layout partially done
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2012-05-18 18:47:14 -06:00 |
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Michael Ossmann
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aeaeb13dd5
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starting module placement
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2012-05-18 15:15:29 -06:00 |
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Michael Ossmann
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c0414606f5
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LP balun module
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2012-05-18 14:36:40 -06:00 |
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Michael Ossmann
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6c843ce7dd
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HP filter module, take one. looks completely wrong.
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2012-05-18 12:58:50 -06:00 |
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Michael Ossmann
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a7d8de9979
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LP filter module
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2012-05-18 12:22:09 -06:00 |
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Michael Ossmann
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8e88ad529c
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fixed module I accidently blew away with another
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2012-05-18 12:08:33 -06:00 |
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Michael Ossmann
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bc1c076836
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more modules
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2012-05-18 11:42:30 -06:00 |
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Michael Ossmann
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d7fb89a902
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bom details
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2012-05-18 11:10:41 -06:00 |
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Michael Ossmann
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5bfd017f22
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TVS diode module
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2012-05-18 10:47:28 -06:00 |
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Michael Ossmann
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37bf9139f4
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RF switch modules
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2012-05-18 10:40:09 -06:00 |
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Michael Ossmann
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3d80676857
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started module selection
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2012-05-17 17:27:11 -06:00 |
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Michael Ossmann
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2eebe1c6a4
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fixed some input/output designations on schematic symbols
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2012-05-17 17:21:42 -06:00 |
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Michael Ossmann
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95297b6226
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annotation
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2012-05-17 16:42:29 -06:00 |
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Michael Ossmann
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90d3615afc
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finished schematic
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2012-05-17 16:39:50 -06:00 |
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Michael Ossmann
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9f89ee5fa2
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clock input divider
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2012-05-17 11:31:34 -06:00 |
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Michael Ossmann
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13f82a3be2
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added exposed paddle to mixer symbol
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2012-05-17 11:03:49 -06:00 |
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Michael Ossmann
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dcdf32edff
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fixed balun pinouts
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2012-05-17 10:42:39 -06:00 |
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Michael Ossmann
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5ac5ed8d2f
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TVS diodes
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2012-05-16 12:56:53 -06:00 |
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Michael Ossmann
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00503bb297
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switch control header
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2012-05-16 09:43:10 -06:00 |
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Michael Ossmann
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54a5a4b2ce
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switch control logic
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2012-05-15 19:20:46 -06:00 |
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Michael Ossmann
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3746ffce65
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spi header, misc. mixer stuff
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2012-05-12 15:16:12 -06:00 |
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Michael Ossmann
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0d3da8fcef
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loop filter correction
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2012-05-12 14:43:58 -06:00 |
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Michael Ossmann
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8390509806
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loop filter
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2012-05-12 14:39:57 -06:00 |
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Michael Ossmann
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d6559d03b8
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mixer output inductors for power, todo list
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2012-05-12 14:06:53 -06:00 |
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Michael Ossmann
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2c07e6770a
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adjusted blocking cap values for low frequency response
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2012-05-11 17:13:08 -06:00 |
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Michael Ossmann
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99c05db5a8
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added some notes
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2012-05-09 12:01:53 -06:00 |
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Michael Ossmann
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096f99f7bd
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finished switch blocking and bypass caps
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2012-05-09 01:09:38 -06:00 |
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Michael Ossmann
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6d9600c92a
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started adding switch blocking and bypass caps
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2012-05-08 19:31:40 -06:00 |
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Michael Ossmann
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ad1d435a55
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fixed balun pin order
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2012-05-06 16:09:00 -06:00 |
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Michael Ossmann
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f4b908330a
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extended ground plane stitching
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2012-05-06 15:52:11 -06:00 |
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Michael Ossmann
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3da7ffb908
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silkscreen updates
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2012-05-06 11:40:07 -06:00 |
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Michael Ossmann
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df224500cd
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finished layout update for 1V8 option
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2012-05-06 10:56:27 -06:00 |
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Michael Ossmann
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d9682e654d
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started layout updates
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2012-05-06 10:23:59 -06:00 |
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Michael Ossmann
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56bc936185
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fixed VDDOx
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2012-05-06 09:39:42 -06:00 |
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Michael Ossmann
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c04524e1ec
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new modules selected and imported, fixed qfn thermals
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2012-05-06 09:33:37 -06:00 |
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Michael Ossmann
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6293eba0ad
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clock input ground note
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2012-05-05 11:08:31 -06:00 |
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Michael Ossmann
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34d68ef807
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Merge branch 'master' of github.com:mossmann/hackrf
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2012-05-05 11:01:20 -06:00 |
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Michael Ossmann
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aefe183847
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1V8 option in schematic
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2012-05-05 10:59:35 -06:00 |
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Michael Ossmann
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214757e2dc
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updated most of the vias to match Sunstone recommendations
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2012-05-05 07:44:54 -06:00 |
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Michael Ossmann
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1ff52b722b
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Merge pull request #1 from wishi/master
added short pic of stuff
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2012-05-02 05:29:01 -07:00 |
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Marius
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125f341836
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Merge branch 'master' of https://github.com/wishi/hackrf
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2012-05-02 11:03:38 +02:00 |
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Marius
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75342aff34
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.
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2012-05-02 11:03:16 +02:00 |
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Marius
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0d46808b24
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Update README
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2012-05-02 12:02:31 +03:00 |
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Marius
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061e1a75f0
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.
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2012-05-02 10:59:17 +02:00 |
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Marius
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faf733038f
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added picture
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2012-05-02 10:56:55 +02:00 |
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Michael Ossmann
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b595de6470
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Fixed integer-mode bug. P3 must be set to 1.
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2012-05-01 12:32:23 -06:00 |
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Michael Ossmann
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aa4d0a442a
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Turned off integer-only for the PLLs too. Perhaps the docs have those bits flipped.
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2012-05-01 10:20:45 -06:00 |
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Michael Ossmann
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580d6f3948
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Turned off integer-only bits because they cause more jitter for some strange reason
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2012-05-01 10:06:09 -06:00 |
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Michael Ossmann
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ed83082ed0
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CLK1-3 all based on MS0, adjust with R dividers
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2012-05-01 09:42:52 -06:00 |
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Michael Ossmann
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cb15d4a83a
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set PLLs to integer-only mode
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2012-05-01 09:08:26 -06:00 |
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