Jared Boone
|
936e356040
|
ldscript memory region clean-up for LPC4330 targets.
|
2014-01-11 15:49:46 -08:00 |
|
Jared Boone
|
095f55abce
|
Make a bit of room in the M0 AHB RAM region for fixed-location shared (M4, M0 cores) data structures.
|
2014-01-11 15:21:20 -08:00 |
|
Jared Boone
|
63292419c8
|
Moved M0 memory region to larger first AHB region (32K), moved USB bulk buffers to smaller AHB RAM area.
|
2014-01-02 15:10:09 -08:00 |
|
Jared Boone
|
f51ee2dc61
|
Modified ldscripts to more accurately represent LPC4330 hardware.
Moved M0 RAM from local to AHB.
Created separate region for sleep RAM.
|
2013-12-07 15:29:50 -08:00 |
|
Jared Boone
|
c365d0a37e
|
Add memory regions for M0 code to live. In the "rom_to_ram" (SPIFI) version, put M0 binary in ROM. In the RAM version, put M0 code in the destination RAM region.
|
2013-11-20 15:14:13 -08:00 |
|
Jared Boone
|
43596e07c5
|
Break off a chunk of local RAM to serve the M0 processor.
|
2013-09-20 20:03:24 -07:00 |
|
Michael Ossmann
|
9f5057d154
|
renamed LPC4330_M4_ROM_to_RAM.ld for case sensitive platforms like mine
|
2013-03-23 10:02:06 -06:00 |
|