Jared Boone
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5363ec3672
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Use new GPIO API to abstract GPIO in various drivers.
Had to do it all at once due to name conflicts with API exposed in libopencm3.
Quite invasive patch! Also precipitated an LED API...
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2014-11-15 16:26:59 -08:00 |
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Jared Boone
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e6c02bea62
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MAX5864: Abstract SPI, extract target code
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2014-11-10 16:55:02 -08:00 |
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Jared Boone
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256d6ccef0
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Re-scope buffer[] to solve unread array warning.
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2014-11-10 11:19:50 -08:00 |
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Jared Boone
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9e95d235b4
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Create separate CMake toolchain file. Add references to toolchain file in each firmware CMakeLists.txt. I suspect this can be simpler still, just not sure how, yet...
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2014-08-11 16:43:58 -07:00 |
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Jared Boone
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2a7ed069c7
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Firmware build system is now CMake, and seems much more sane on the whole.
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2014-08-11 16:37:14 -07:00 |
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Jared Boone
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574056c495
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Fix long-standing example projects breakage due to tuning and SGPIO API and dependency changes.
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2014-01-02 18:24:55 -08:00 |
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Jared Boone
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893c20e41f
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Fix naming problem with SGPIO test project. This is due to my use of VPATH in Makefile_inc.mk, which I'm starting to regret a little bit...
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2013-11-20 15:24:14 -08:00 |
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Jared Boone
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63b1a25979
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Consolidate a few clock setup tasks that repeat among many projects into cpu_clock_init().
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2012-10-17 11:45:30 -07:00 |
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Jared Boone
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9b579232a7
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Consolidated single-slice SGPIO configuration functions into single sgpio_configure() function.
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2012-10-11 15:45:28 -07:00 |
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Jared Boone
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c02bf358d1
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Added license/copyright to several Makefiles.
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2012-10-10 15:50:31 -07:00 |
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Jared Boone
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5989465eb9
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Add SGPIO configuration API and code, extracted from existing SGPIO projects.
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2012-10-10 14:30:28 -07:00 |
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Jared Boone
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f574f70a87
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More small tweaks due to CGU register #define changes.
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2012-09-27 17:52:36 -07:00 |
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Jared Boone
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72ee83eda9
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Moving gpio_setup() / pin_setup() functions in separate projects to hackrf_core.h/c.
Moved enable_1v8_power() and release_cpld_jtag_pins() to hackrf_core.h/c.
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2012-07-31 21:38:57 -07:00 |
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Jared Boone
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2e16f51252
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Python program to verify logic on the Lollipop board.
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2012-06-19 23:09:42 -07:00 |
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Jared Boone
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72e3dc1e21
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TX sample generation loop that outputs an eight-sample sine wave. (1.25MHz assuming 10MHz codec clock.)
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2012-06-15 16:20:46 -07:00 |
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Jared Boone
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bab6ec5fef
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Move buffer allocation to before enabling CPLD I/O, so as not to mess up I/Q synchronization.
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2012-06-15 16:16:05 -07:00 |
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Jared Boone
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e32a60495a
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Change initial TX output data to the neutral value (0x80).
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2012-06-15 16:14:58 -07:00 |
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Jared Boone
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59a5b92300
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Correct CPLD JTAG pin release code to properly tri-state the pins.
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2012-06-15 16:13:17 -07:00 |
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Jared Boone
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74ad447ec7
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More idiotic editor formatting fixup.
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2012-06-14 11:48:07 -07:00 |
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Jared Boone
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388cad86de
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Code to capture ADC data into a buffer using a tight loop on the M4.
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2012-06-14 11:31:11 -07:00 |
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Jared Boone
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878936645d
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Corrected my correction of my misunderstanding of how SGPIO_CTRL_ENABLE works. Turns out I *can* immediately disable a slice using ENABLE. If I want to synchronously disable a slice, I do it via DISABLE. And if I want to screw up my code, I (unwittingly) set all slices to synchronously disable, then configure SGPIO and watch my slices run once and stop. :-( All better now.
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2012-06-14 11:30:03 -07:00 |
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Jared Boone
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3c35e39e55
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Clean up SGPIO TX code a little bit.
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2012-06-13 22:00:37 -07:00 |
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Jared Boone
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b5ec859eaf
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Remove comment of dead code.
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2012-06-13 22:00:11 -07:00 |
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Jared Boone
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17446f6295
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Add RX test, which receives data into a single slice.
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2012-06-13 21:58:47 -07:00 |
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Jared Boone
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b7a46af009
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I was misusing SGPIO_CTRL_ENABLE. Instead, use SGPIO_CTRL_DISABLE to disable slices.
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2012-06-13 21:54:48 -07:00 |
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Jared Boone
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d6cf4ec014
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Initial SGPIO implementation. Sends a constant value to each channel of the DAC that can be measured as differential voltages to identify which channel is which.
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2012-06-13 18:04:13 -07:00 |
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