Sojus07/hackrf
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406 Commits

Author SHA1 Message Date
Ben Gamari
d2b2b11998 xapp058/ports: Clean up comments and dead code 
It's still not pretty but it's an improvement
 2013-09-14 18:24:25 -04:00
Jared Boone
bafe97e302 Extract knowledge of RF path configurations from the RFFC5071 driver. 
Change initial RF path mode to SWITCHCTRL_SAFE. (Previously started at SWITCHCTRL_SAFE and then immediately switched to SWITCHCTRL_AMP_BYPASS.)
 2013-09-07 12:59:57 -07:00
Jared Boone
518c46a111 Oops, missed a spot where I should've called a MAX2837 mode function. 2013-09-06 23:09:29 -07:00
Jared Boone
a367f84d15 Add MAX2837 mode set/get functions. 2013-09-06 22:29:57 -07:00
Jared Boone
a5c0b5deeb Add MAX2837 functions to control operating mode. 
Replace direct manipulation of GPIOs controlling MAX2837 with operating mode functions.
 2013-09-06 21:29:31 -07:00
Jared Boone
d76d72665e Adjusted cpu_clock_pll1_low_speed() to operate at 48MHz, as per several comments with the code. The actual MSEL value was previously selecting 84MHz. 2013-09-04 16:23:32 -07:00
Jared Boone
237bf6ecdb Pulled redundant PLL1 initialization code from cpu_clock_init(). Called cpu_clock_pll1_low_speed() instead. 2013-09-04 16:22:41 -07:00
Jared Boone
189d245868 Merge remote-tracking branch 'TitanMKD/master' into titanmkd_overclock_fix 
Conflicts:
	firmware/hackrf_usb/hackrf_usb.c
 2013-09-04 12:41:03 -07:00
TitanMKD
24ed48d93a Fix for "issues/62 fix PLL1 overclock bug" see hackrf_core.c -> cpu_clock_init() 
Fix for "issues/78 startup current too high" see hackrf_core.c -> New functions cpu_clock_pll1_low_speed()/cpu_clock_pll1_max_speed() & hackrf_usb.c to switch low_speed/max_speed.
 2013-08-28 22:01:57 +02:00
Ben Gamari
1bbe375746 A few more changes due to the libopencm3 merge 2013-07-07 17:48:54 -04:00
Ben Gamari
98f30188c1 Ensure that LPC43XX is defined for libopencm3 2013-07-07 17:48:54 -04:00
Ben Gamari
8a529617e5 Build against libopencm3 submodule tree by default 2013-07-01 00:21:49 -04:00
Hoernchen
b33f534da0 firmware, lib: update comments, doc 2013-06-17 12:32:12 +02:00
Hoernchen
839a1a170f fw: dc offset correction fix 
pins b7 & b6 are floating, disable re-triggering
selecting a different HPC_STOP fixes the dc offset drift
disabling and enabling rx/tx after tuning triggers the dc offset
correction
 2013-06-16 20:26:02 +02:00
Hoernchen
8063bd8207 firmware: if precision 2013-06-16 20:24:32 +02:00
Hoernchen
bee537dc01 firmware: rffc frac, if gain 2013-06-16 20:23:47 +02:00
Hoernchen
8f55436cd1 firmware: fix a warning 2013-06-09 09:15:35 -06:00
Hoernchen
deafbab9fc lib: make sure to tell the linker that we're hardfloat, or it will choose the wrong libgcc.a... 2013-06-09 00:10:05 +02:00
Sylvain Munaut
f0c7fe66f1 firmware: New fractional sample rate algorithm and usb command 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2013-06-09 00:08:18 +02:00
Hoernchen
1e326997ed firmware: enable int mode if div is even integer 
to improve jitter performance
 2013-06-07 23:10:35 +02:00
Hoernchen
1925649a01 firmware: fractional sample rates 2013-06-07 14:29:14 +02:00
Sylvain Munaut
472bcd414a firmware/build: Use gnu99 coding convention 
C99 doesn't require/support anonymous struct/unions in some GCC versions
and those are used a lot.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2013-06-06 22:52:40 +02:00
Hoernchen
a95f49b543 disable si clock to lpc 
leaving it on but unused causes major spurs to appear all over the
place..
 2013-06-05 17:35:01 +02:00
Hoernchen
b6a0b09b1d firmware: remove 5mhz option 2013-05-29 17:47:02 +02:00
Hoernchen
7f6a730c6e si clock for the lpc 2013-05-29 17:12:06 +02:00
Hoernchen
233c56c79d libhackrf/firmware: merge txvga gain into one gain range of 0-47 2013-05-29 00:53:41 +02:00
Hoernchen
19e8628650 firmware: fix plus 16db tx gain 2013-05-27 15:28:51 +02:00
Hoernchen
abc3cd1f4f firmware: gain control 2013-05-27 14:01:22 +02:00
Michael Ossmann
60d21a3310 commenting out CGU_PLL1_CTRL_DIRECT=1 because it breaks boot from spifi 2013-05-11 18:55:00 -06:00
Jared Boone
1723cd12a1 Oops, read PLL1 documentation again. Looks like FBSEL=1 is for "normal operation". So include that, but use DIRECT=1 to skip the PSEL divider (which would prevent us producing 204MHz from an in-spec PLL frequency). 2013-05-11 12:25:54 -07:00
Jared Boone
e065cdfe20 Slowed down edges on LED and power enable signals -- they don't need to be fast, and this *might* have a negligible but positive effect on noise. 2013-05-11 12:13:00 -07:00
Jared Boone
d9884af8b8 PLL1 was misconfigured to run at 408MHz (way out of spec) instead of 204MHz. Corrected this by using DIRECT=1 instead of FBSEL=1. 2013-05-11 12:11:37 -07:00
Jared Boone
a4a2a3d6ba Added SCU pinmux data for USB LEDs, configured USB LEDs to be outputs (not float). 2013-05-11 08:09:07 -07:00
TitanMKD
8777f93721 Cleanup on xxx_rom_to_ram directory now it contains only makefile, removed redundant .c file from xxx dir. 
Fixed IAP "IAP_CMD_READ_SERIAL_NO" for LPC43xx flashless part not supporting IAP by using SPIFI w25q80bv Unique ID(64bits).
Fixed SPIFI erase/program also now it with check SPIFI w25q80bv Device ID = 0x13 at start of w25q80bv_setup()/w25q80bv_chip_erase()/w25q80bv_program().
 2013-04-07 18:55:12 +02:00
TitanMKD
b8590db02a Comment fix. 2013-04-04 19:48:28 +02:00
TitanMKD
118953b451 Lot of comments added. 2013-04-04 19:19:59 +02:00
TitanMKD
31356cc998 Merge branch 'master' of git://github.com/mossmann/hackrf 
Conflicts:
	host/libhackrf/examples/hackrf_transfer.c
Fixed conflict with cleanup and fixed bug on 64bits value.
 2013-03-24 09:56:56 +01:00
Michael Ossmann
9f5057d154 renamed LPC4330_M4_ROM_to_RAM.ld for case sensitive platforms like mine 2013-03-23 10:02:06 -06:00
TitanMKD
d509489fff ssp1_set_mode_max2837()/void ssp1_set_mode_max5864(void) SPI speed updated to 4.857MHz instead of 0.0498MHz 
To do test it to check there is no problem.
 2013-03-20 22:20:47 +01:00
TitanMKD
7836911c45 fault_handler add more info in case of crash. 2013-03-10 14:23:26 +01:00
TitanMKD
6620fe6ba9 Add host(hackrf_info)/fw(usb_performance) IAP read part id/serial no(to be confirmed). 2013-03-09 11:47:28 +01:00
Michael Ossmann
1a2f871520 moved set_freq out of hackrf_core to facilitate switchctrl fixes 2013-03-07 17:35:48 -07:00
Michael Ossmann
052d842f36 temporary fix for gpo/switchctrl. only works for TX 2013-03-07 16:56:44 -07:00
TitanMKD
e3784c886e set_freq for firmware & host. tested basicly checking with debugger value mhz/hz from host to fw. 2013-03-07 23:24:00 +01:00
TitanMKD
f9d72a7f87 Merge branch 'master' of git://github.com/mossmann/hackrf 2013-03-07 21:32:56 +01:00
Michael Ossmann
155a688d11 updated rffc test/commments 2013-03-07 10:35:49 -07:00
TitanMKD
e2c05fbfe2 Draft in progress (not tested at all) set_freq(). 2013-02-26 00:17:18 +01:00
Michael Ossmann
85dfc2a930 implemented transceiver mode OFF 2013-02-24 15:13:39 -07:00
Michael Ossmann
771b93fe62 increased rffc5071 serial speed 2013-02-24 14:25:51 -07:00
Michael Ossmann
a74cd9fdf9 clear MAX2837 RXENABLE when going into TX mode and vice versa 2013-02-24 10:17:50 -07:00