Michael Ossmann
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15bda174c7
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maintain PLLA on XTAL and PLLB on CLKIN at all times (makes automatic clock source switching more reliable)
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2014-03-14 22:27:30 -06:00 |
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Michael Ossmann
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ca04d7c04b
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activated CLKOUT (always on) and CLKIN (automatically used when detected)
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2014-03-14 21:28:13 -06:00 |
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Hoernchen
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8f55436cd1
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firmware: fix a warning
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2013-06-09 09:15:35 -06:00 |
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Hoernchen
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1e326997ed
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firmware: enable int mode if div is even integer
to improve jitter performance
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2013-06-07 23:10:35 +02:00 |
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Hoernchen
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1925649a01
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firmware: fractional sample rates
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2013-06-07 14:29:14 +02:00 |
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Hoernchen
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7f6a730c6e
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si clock for the lpc
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2013-05-29 17:12:06 +02:00 |
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Jared Boone
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6babcbe579
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Add USB vendor requests to read/write Si5351C registers.
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2012-10-17 11:57:44 -07:00 |
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Jared Boone
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4f9a5a1ba4
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Fix-ups to copyrights -- missing e-mail address and inconsistent formatting.
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2012-10-06 19:14:55 -07:00 |
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Michael Ossmann
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ad080a355a
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pull request #10, resolved conflicts
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2012-06-13 21:21:34 -06:00 |
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Jared Boone
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02f61f4d64
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Added r_div argument to si5351c_configure_multisynth(). Modified Jellybean clock setup to provide 10MHz clock to MAX5864 and 20MHz to CPLD (both inverted and non-inverted).
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2012-06-13 17:53:10 -07:00 |
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Michael Ossmann
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056ddd0601
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r divider configurable, added CLK5 for mixer reference input
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2012-06-13 16:02:40 -06:00 |
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Michael Ossmann
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bcd5b36161
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forgot a header file
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2012-06-07 08:18:34 -06:00 |
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