16 Commits

Author SHA1 Message Date
Michael Ossmann
42a3582f98 added resistors to decrease clock signal overshoot 2013-11-21 18:29:56 -07:00
Michael Ossmann
0002351b21 changed some capacitor values to improve low frequency performance 2013-11-21 18:08:49 -07:00
Michael Ossmann
95ffc704a1 P28 and P29 reworked, exposed unused SGPIO signals, moved some CPLD JTAG signals to P28 2013-11-16 21:22:25 -07:00
Michael Ossmann
515b6973aa exposed GCK1, GCK2 on expansion P28 instead of extra CPLD pins. also ditched 1V8 on P30 2013-11-11 17:23:45 -07:00
Michael Ossmann
1fa9c9aa04 many test points 2013-11-10 19:53:25 -07:00
Michael Ossmann
297639df6e chose a different button 2013-11-09 17:26:14 -07:00
Michael Ossmann
2edd0caa66 pushbutton component selection 2013-11-08 17:26:14 -07:00
Michael Ossmann
8720b84e3e started rearranging expansion headers 2013-11-06 23:24:51 -07:00
Michael Ossmann
b2291ba5d9 SPI flash layout 2013-11-06 15:32:09 -07:00
Michael Ossmann
17e469c979 analog baseband headers 2013-10-31 21:45:34 -06:00
Michael Ossmann
c6bacf0e21 module selection update to agree with recent schematic changes 2013-10-28 17:06:49 -06:00
Michael Ossmann
0d59261ae3 removed RF switch logic ICs, replaced with direct GPIO 2013-10-25 18:05:03 -06:00
Michael Ossmann
3b07a93eea RTC expansion 2013-10-25 13:47:43 -06:00
Michael Ossmann
cbd3295cb3 fixed clock input and output to 3.3V CMOS 2013-10-24 14:42:03 -06:00
Michael Ossmann
f78bb74dd9 removed boot headers, added reset and DFU pushbuttons 2013-09-29 18:47:39 -06:00
Michael Ossmann
822b0e73fc HackRF One: started hardware design by copying Jawbreaker 2013-09-29 18:33:34 -06:00