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Modified ldscripts to more accurately represent LPC4330 hardware.

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Moved M0 RAM from local to AHB.
Created separate region for sleep RAM.
This commit is contained in:
Jared Boone
2013-12-07 15:29:50 -08:00
parent 34b01d89af
commit f51ee2dc61
2 changed files with 11 additions and 12 deletions
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14
firmware/common/LPC4330_M4.ld
View File

@ -20,22 +20,22 @@
* Boston, MA 02110-1301, USA. * Boston, MA 02110-1301, USA.
*/ */
/* Linker script for HackRF Jellybean (LPC4330, 1M SPI flash, 264K SRAM). */ /* Linker script for HackRF Jellybean/Jawbreaker (LPC4330, 1M SPI flash, 264K SRAM). */
MEMORY MEMORY
{ {
/* Physical address in Flash used to copy Code from Flash to RAM */
rom_flash (rx) : ORIGIN = 0x80000000, LENGTH = 1M
/* rom is really the shadow region that points to SPI flash or elsewhere */ /* rom is really the shadow region that points to SPI flash or elsewhere */
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M rom (rx) : ORIGIN = 0x00000000, LENGTH = 128K
ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K
ram_m0 (rwx) : ORIGIN = 0x10090000, LENGTH = 8K ram_sleep (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
/* there are some additional RAM regions */
ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
/* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM
* to get performance benefit of having two USB buffers addressable * to get performance benefit of having two USB buffers addressable
* simultaneously (on two different buses of the AHB multilayer matrix) * simultaneously (on two different buses of the AHB multilayer matrix)
*/ */
ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K ram_m0 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K
} }
/* Include the common ld script. */ /* Include the common ld script. */
@ -43,7 +43,7 @@ INCLUDE libopencm3_lpc43xx.ld
SECTIONS SECTIONS
{ {
.m0 0x10090000 : { .m0 0x2000C000 : {
PROVIDE(__m0_start__ = .); PROVIDE(__m0_start__ = .);
KEEP(*(.m0_bin*)); KEEP(*(.m0_bin*));
. = ALIGN(4); . = ALIGN(4);

9
firmware/common/LPC4330_M4_rom_to_ram.ld
View File

@ -21,23 +21,22 @@
* Boston, MA 02110-1301, USA. * Boston, MA 02110-1301, USA.
*/ */
/* Linker script for HackRF Jellybean (LPC4330, 1M SPI flash, 264K SRAM). */ /* Linker script for HackRF Jellybean/Jawbreaker (LPC4330, 1M SPI flash, 264K SRAM). */
MEMORY MEMORY
{ {
/* Physical address in Flash used to copy Code from Flash to RAM */ /* Physical address in Flash used to copy Code from Flash to RAM */
rom_flash (rx) : ORIGIN = 0x80000000, LENGTH = 1M rom_flash (rx) : ORIGIN = 0x80000000, LENGTH = 1M
/* rom is really the shadow region that points to SPI flash or elsewhere */ /* rom is really the shadow region that points to SPI flash or elsewhere */
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M rom (rx) : ORIGIN = 0x00000000, LENGTH = 128K
ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K
ram_m0 (rwx) : ORIGIN = 0x10090000, LENGTH = 8K ram_sleep (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
/* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM
* to get performance benefit of having two USB buffers addressable * to get performance benefit of having two USB buffers addressable
* simultaneously (on two different buses of the AHB multilayer matrix) * simultaneously (on two different buses of the AHB multilayer matrix)
*/ */
ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K ram_m0 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K
} }
/* Include the common ld script. */ /* Include the common ld script. */